subject:"\[PATCH 5\/7\] arm64\: dts\: exynos\: Add dts files for Samsung Exynos5433 64bit SoC"

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-22 Thread Chanwoo Choi

Hi Marek,

On 2016년 08월 19일 19:48, Marek Szyprowski wrote:
> Hello,
> 
> 
> On 2016-08-16 08:35, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
>>
>> This patch includes following Device Tree node to support Exynos5433 SoC:
>> 1. Octa cores for big.LITTLE architecture
>> - Cortex-A53 LITTLE Quad-core
>> - Cortex-A57 big Quad-core
>> - Support PSCI v0.1
>>
>> 2. Clock controller node
>> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
>> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
>> - CMU_MIF   : clocks for DRAM Memory Controller
>> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
>> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
>> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
>> - CMU_G2D   : clocks for G2D/MDMA
>> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
>> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
>> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
>> - CMU_G3D   : clocks for 3D Graphics Engine
>> - CMU_GSCL  : clocks for GSCALER
>> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
>> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>>CoreSight and L2 cache controller.
>> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
>> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
>> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
>> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
>> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
>> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
>>
>> 3. pinctrl node for GPIO
>> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
>>
>> 4. Timer
>> - ARM architecture timer (armv8-timer)
>> - MCT (Multi Core Timer) timer
>>
>> 5. Interrupt controller (GIC-400)
>>
>> 6. BUS devices
>> - HS-I2C (High-Speed I2C) device
>> - SPI (Serial Peripheral Interface) device
>>
>> 7. Sound devices
>> - I2S bus
>> - LPASS (Low Power Audio Subsystem)
>>
>> 8. Power management devices
>> - CPUFREQ for for Cortex-A53/A57
>> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
>>
>> 9. Display controller devices
>> - DECON (Display and enhancement controller) for panel output
>> - DSI (Display Serial Interface)
>> - MIC (Mobile Image Compressor)
>> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
> 
> I would prefer to instantiate only SYSMMU controllers for the devices that
> have been already added, so initially there will by only SYSMMUs for DECON.
> Other (GSCL, TV, MFC, JPEG, CAMERA ISP) can be added later together with
> respective master device nodes.

OK. I'll remove all SYSMMU dt nodes from exynos5433.dtsi
on next version.

[snip]

-- 
Best Regards,
Chanwoo Choi

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-22 Thread Chanwoo Choi

Hi Marek,

On 2016년 08월 19일 19:48, Marek Szyprowski wrote:
> Hello,
> 
> 
> On 2016-08-16 08:35, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
>>
>> This patch includes following Device Tree node to support Exynos5433 SoC:
>> 1. Octa cores for big.LITTLE architecture
>> - Cortex-A53 LITTLE Quad-core
>> - Cortex-A57 big Quad-core
>> - Support PSCI v0.1
>>
>> 2. Clock controller node
>> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
>> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
>> - CMU_MIF   : clocks for DRAM Memory Controller
>> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
>> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
>> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
>> - CMU_G2D   : clocks for G2D/MDMA
>> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
>> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
>> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
>> - CMU_G3D   : clocks for 3D Graphics Engine
>> - CMU_GSCL  : clocks for GSCALER
>> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
>> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>>CoreSight and L2 cache controller.
>> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
>> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
>> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
>> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
>> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
>> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
>>
>> 3. pinctrl node for GPIO
>> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
>>
>> 4. Timer
>> - ARM architecture timer (armv8-timer)
>> - MCT (Multi Core Timer) timer
>>
>> 5. Interrupt controller (GIC-400)
>>
>> 6. BUS devices
>> - HS-I2C (High-Speed I2C) device
>> - SPI (Serial Peripheral Interface) device
>>
>> 7. Sound devices
>> - I2S bus
>> - LPASS (Low Power Audio Subsystem)
>>
>> 8. Power management devices
>> - CPUFREQ for for Cortex-A53/A57
>> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
>>
>> 9. Display controller devices
>> - DECON (Display and enhancement controller) for panel output
>> - DSI (Display Serial Interface)
>> - MIC (Mobile Image Compressor)
>> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
> 
> I would prefer to instantiate only SYSMMU controllers for the devices that
> have been already added, so initially there will by only SYSMMUs for DECON.
> Other (GSCL, TV, MFC, JPEG, CAMERA ISP) can be added later together with
> respective master device nodes.

OK. I'll remove all SYSMMU dt nodes from exynos5433.dtsi
on next version.

[snip]

-- 
Best Regards,
Chanwoo Choi

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-19 Thread Marek Szyprowski


Hello,


On 2016-08-16 08:35, Chanwoo Choi wrote:

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.

This patch includes following Device Tree node to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Support PSCI v0.1

2. Clock controller node
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
   CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. pinctrl node for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. Timer
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer

5. Interrupt controller (GIC-400)

6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device

7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)

8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP

9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)
- IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC


I would prefer to instantiate only SYSMMU controllers for the devices that
have been already added, so initially there will by only SYSMMUs for DECON.
Other (GSCL, TV, MFC, JPEG, CAMERA ISP) can be added later together with
respective master device nodes.


10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller

11. Storage devices
- MSHC (Mobile Stoarage Host Controller)

12. Misc devices
- UART device
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)

Signed-off-by: Chanwoo Choi 
Signed-off-by: Jaehoon Chung 
Signed-off-by: Seung-Woo Kim 
Signed-off-by: Joonyoung Shim 
Signed-off-by: Inki Dae 
Signed-off-by: Jonghwa Lee 
Signed-off-by: Beomho Seo 
Signed-off-by: Jaewon Kim 
Signed-off-by: Hyungwon Hwang 
Signed-off-by: Inha Song 
Signed-off-by: Ingi kim 
Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Marek Szyprowski 
Signed-off-by: Andrzej Hajda 
Signed-off-by: Sylwester Nawrocki 
---
  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
  5 files changed, 2725 insertions(+)
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
  create mode 100644 
arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi


(snipped)


Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-19 Thread Marek Szyprowski


Hello,


On 2016-08-16 08:35, Chanwoo Choi wrote:

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.

This patch includes following Device Tree node to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Support PSCI v0.1

2. Clock controller node
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
   CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. pinctrl node for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. Timer
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer

5. Interrupt controller (GIC-400)

6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device

7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)

8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP

9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)
- IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC


I would prefer to instantiate only SYSMMU controllers for the devices that
have been already added, so initially there will by only SYSMMUs for DECON.
Other (GSCL, TV, MFC, JPEG, CAMERA ISP) can be added later together with
respective master device nodes.


10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller

11. Storage devices
- MSHC (Mobile Stoarage Host Controller)

12. Misc devices
- UART device
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)

Signed-off-by: Chanwoo Choi 
Signed-off-by: Jaehoon Chung 
Signed-off-by: Seung-Woo Kim 
Signed-off-by: Joonyoung Shim 
Signed-off-by: Inki Dae 
Signed-off-by: Jonghwa Lee 
Signed-off-by: Beomho Seo 
Signed-off-by: Jaewon Kim 
Signed-off-by: Hyungwon Hwang 
Signed-off-by: Inha Song 
Signed-off-by: Ingi kim 
Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Marek Szyprowski 
Signed-off-by: Andrzej Hajda 
Signed-off-by: Sylwester Nawrocki 
---
  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
  5 files changed, 2725 insertions(+)
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
  create mode 100644 
arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi


(snipped)


Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Krzysztof,

On 2016년 08월 17일 02:51, Krzysztof Kozlowski wrote:
> On Tue, Aug 16, 2016 at 09:59:26PM +0900, Chanwoo Choi wrote:
 diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi 
 b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 new file mode 100644
 index ..175121db367e
 --- /dev/null
 +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 @@ -0,0 +1,306 @@
 +/*
 + * Device tree sources for Exynos5433 thermal zone
 + *
 + * Copyright (c) 2016 Chanwoo Choi 
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#include 
 +
 +/ {
 +thermal-zones {
 +  atlas0_thermal: atlas0-thermal {
 +  thermal-sensors = <_atlas0>;
 +  polling-delay-passive = <0>;
 +  polling-delay = <0>;
 +  trips {
 +  atlas0_alert_0: atlas0-alert-0 {
 +  temperature = <5>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_1: atlas0-alert-1 {
 +  temperature = <55000>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_2: atlas0-alert-2 {
 +  temperature = <6>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_3: atlas0-alert-3 {
 +  temperature = <7>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_4: atlas0-alert-4 {
 +  temperature = <8>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_5: atlas0-alert-5 {
 +  temperature = <9>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_6: atlas0-alert-6 {
 +  temperature = <95000>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
>>>
>>> No critical trip? I think it might be useful to shutdown the system in a
>>> user-friendly way.
>>
>> When I use the critical trip, the following event occur[1].
>> But, I guess that this temperature is not correct temperature
>> because after completing the kernel booting, the temperature of 
>> big.LITTLE/G3D
>> are normal when checking the /sys/class/thermal/thermal_zoneX/temp right 
>> after booting.
>> - Maintain a uniform temperature(38 ~ 45 millicelsius) right after kernel 
>> booting.
>>
>> I guess that the critical interrupt may occur before initializing the exynos 
>> tmu.
>> But, I don't spend the many time to check the exynos-tmu.c driver.
>>
>> [1]
>> [  445.122122] thermal thermal_zone0: critical temperature reached(108 
>> C),shutting down
>> [  445.122399] exynos-tmu 1006.tmu: Temperature sensor ID: 0xa
>> [  445.122588] exynos-tmu 1006.tmu: Calibration type is 2-point 
>> calibration
>> [  445.127942] reboot: Failed to start orderly shutdown: forcing the issue
>> [  445.134586] Emergency Sync complete
>> [1.097954] reboot: Power down
> 
> I understand. Apparently the exynos-tmu driver needs some fixes for
> this race. Skipping critical then makes sense.
> 
>>
>>>
 +  };
 +
 +  cooling-maps {
 +  map0 {
 +  /* Set maximum frequency as 1800MHz  */
 +  trip = <_alert_0>;
 +  cooling-device = < 1 1>;
>>>
>>> Out of curiosity: why choosing specific cooling level (so quite fast
>>> the device will slow down) instead of letting cooling framework to
>>> decide how much to cool? Any particular reason behind this?
>>
>> This cooling level is just default value in cooling-maps.
>> This value is able to overwrite on dts file. 
>>
>> And the thermal subsystem support the cpu cooling features
>> with 'cooling-maps'.
>>
>> Also, when I tested the performance and stress test
>> with GLBenchmark, the

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Krzysztof,

On 2016년 08월 17일 02:51, Krzysztof Kozlowski wrote:
> On Tue, Aug 16, 2016 at 09:59:26PM +0900, Chanwoo Choi wrote:
 diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi 
 b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 new file mode 100644
 index ..175121db367e
 --- /dev/null
 +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 @@ -0,0 +1,306 @@
 +/*
 + * Device tree sources for Exynos5433 thermal zone
 + *
 + * Copyright (c) 2016 Chanwoo Choi 
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#include 
 +
 +/ {
 +thermal-zones {
 +  atlas0_thermal: atlas0-thermal {
 +  thermal-sensors = <_atlas0>;
 +  polling-delay-passive = <0>;
 +  polling-delay = <0>;
 +  trips {
 +  atlas0_alert_0: atlas0-alert-0 {
 +  temperature = <5>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_1: atlas0-alert-1 {
 +  temperature = <55000>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_2: atlas0-alert-2 {
 +  temperature = <6>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_3: atlas0-alert-3 {
 +  temperature = <7>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_4: atlas0-alert-4 {
 +  temperature = <8>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_5: atlas0-alert-5 {
 +  temperature = <9>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
 +  atlas0_alert_6: atlas0-alert-6 {
 +  temperature = <95000>;  /* millicelsius */
 +  hysteresis = <1000>;/* millicelsius */
 +  type = "active";
 +  };
>>>
>>> No critical trip? I think it might be useful to shutdown the system in a
>>> user-friendly way.
>>
>> When I use the critical trip, the following event occur[1].
>> But, I guess that this temperature is not correct temperature
>> because after completing the kernel booting, the temperature of 
>> big.LITTLE/G3D
>> are normal when checking the /sys/class/thermal/thermal_zoneX/temp right 
>> after booting.
>> - Maintain a uniform temperature(38 ~ 45 millicelsius) right after kernel 
>> booting.
>>
>> I guess that the critical interrupt may occur before initializing the exynos 
>> tmu.
>> But, I don't spend the many time to check the exynos-tmu.c driver.
>>
>> [1]
>> [  445.122122] thermal thermal_zone0: critical temperature reached(108 
>> C),shutting down
>> [  445.122399] exynos-tmu 1006.tmu: Temperature sensor ID: 0xa
>> [  445.122588] exynos-tmu 1006.tmu: Calibration type is 2-point 
>> calibration
>> [  445.127942] reboot: Failed to start orderly shutdown: forcing the issue
>> [  445.134586] Emergency Sync complete
>> [1.097954] reboot: Power down
> 
> I understand. Apparently the exynos-tmu driver needs some fixes for
> this race. Skipping critical then makes sense.
> 
>>
>>>
 +  };
 +
 +  cooling-maps {
 +  map0 {
 +  /* Set maximum frequency as 1800MHz  */
 +  trip = <_alert_0>;
 +  cooling-device = < 1 1>;
>>>
>>> Out of curiosity: why choosing specific cooling level (so quite fast
>>> the device will slow down) instead of letting cooling framework to
>>> decide how much to cool? Any particular reason behind this?
>>
>> This cooling level is just default value in cooling-maps.
>> This value is able to overwrite on dts file. 
>>
>> And the thermal subsystem support the cpu cooling features
>> with 'cooling-maps'.
>>
>> Also, when I tested the performance and stress test
>> with GLBenchmark, the temperature of

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Krzysztof Kozlowski

On Tue, Aug 16, 2016 at 09:59:26PM +0900, Chanwoo Choi wrote:
> >> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi 
> >> b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> >> new file mode 100644
> >> index ..175121db367e
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> >> @@ -0,0 +1,306 @@
> >> +/*
> >> + * Device tree sources for Exynos5433 thermal zone
> >> + *
> >> + * Copyright (c) 2016 Chanwoo Choi 
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2 as
> >> + * published by the Free Software Foundation.
> >> + */
> >> +
> >> +#include 
> >> +
> >> +/ {
> >> +thermal-zones {
> >> +  atlas0_thermal: atlas0-thermal {
> >> +  thermal-sensors = <_atlas0>;
> >> +  polling-delay-passive = <0>;
> >> +  polling-delay = <0>;
> >> +  trips {
> >> +  atlas0_alert_0: atlas0-alert-0 {
> >> +  temperature = <5>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_1: atlas0-alert-1 {
> >> +  temperature = <55000>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_2: atlas0-alert-2 {
> >> +  temperature = <6>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_3: atlas0-alert-3 {
> >> +  temperature = <7>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_4: atlas0-alert-4 {
> >> +  temperature = <8>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_5: atlas0-alert-5 {
> >> +  temperature = <9>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_6: atlas0-alert-6 {
> >> +  temperature = <95000>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> > 
> > No critical trip? I think it might be useful to shutdown the system in a
> > user-friendly way.
> 
> When I use the critical trip, the following event occur[1].
> But, I guess that this temperature is not correct temperature
> because after completing the kernel booting, the temperature of big.LITTLE/G3D
> are normal when checking the /sys/class/thermal/thermal_zoneX/temp right 
> after booting.
> - Maintain a uniform temperature(38 ~ 45 millicelsius) right after kernel 
> booting.
> 
> I guess that the critical interrupt may occur before initializing the exynos 
> tmu.
> But, I don't spend the many time to check the exynos-tmu.c driver.
> 
> [1]
> [  445.122122] thermal thermal_zone0: critical temperature reached(108 
> C),shutting down
> [  445.122399] exynos-tmu 1006.tmu: Temperature sensor ID: 0xa
> [  445.122588] exynos-tmu 1006.tmu: Calibration type is 2-point 
> calibration
> [  445.127942] reboot: Failed to start orderly shutdown: forcing the issue
> [  445.134586] Emergency Sync complete
> [1.097954] reboot: Power down

I understand. Apparently the exynos-tmu driver needs some fixes for
this race. Skipping critical then makes sense.

> 
> > 
> >> +  };
> >> +
> >> +  cooling-maps {
> >> +  map0 {
> >> +  /* Set maximum frequency as 1800MHz  */
> >> +  trip = <_alert_0>;
> >> +  cooling-device = < 1 1>;
> > 
> > Out of curiosity: why choosing specific cooling level (so quite fast
> > the device will slow down) instead of letting cooling framework to
> > decide how much to cool? Any particular reason behind this?
> 
> This cooling level is just default value in cooling-maps.
> This value is able to overwrite on dts file. 
> 
> And the thermal subsystem support the cpu cooling features
> with 'cooling-maps'.
> 
> Also, when I tested the performance and stress test
> with GLBenchmark, the temperature of big.LITTLE cores/G3D
> reach easily the critical temperature with 8 online cores.
> So,

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Krzysztof Kozlowski

On Tue, Aug 16, 2016 at 09:59:26PM +0900, Chanwoo Choi wrote:
> >> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi 
> >> b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> >> new file mode 100644
> >> index ..175121db367e
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> >> @@ -0,0 +1,306 @@
> >> +/*
> >> + * Device tree sources for Exynos5433 thermal zone
> >> + *
> >> + * Copyright (c) 2016 Chanwoo Choi 
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2 as
> >> + * published by the Free Software Foundation.
> >> + */
> >> +
> >> +#include 
> >> +
> >> +/ {
> >> +thermal-zones {
> >> +  atlas0_thermal: atlas0-thermal {
> >> +  thermal-sensors = <_atlas0>;
> >> +  polling-delay-passive = <0>;
> >> +  polling-delay = <0>;
> >> +  trips {
> >> +  atlas0_alert_0: atlas0-alert-0 {
> >> +  temperature = <5>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_1: atlas0-alert-1 {
> >> +  temperature = <55000>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_2: atlas0-alert-2 {
> >> +  temperature = <6>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_3: atlas0-alert-3 {
> >> +  temperature = <7>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_4: atlas0-alert-4 {
> >> +  temperature = <8>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_5: atlas0-alert-5 {
> >> +  temperature = <9>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> >> +  atlas0_alert_6: atlas0-alert-6 {
> >> +  temperature = <95000>;  /* millicelsius */
> >> +  hysteresis = <1000>;/* millicelsius */
> >> +  type = "active";
> >> +  };
> > 
> > No critical trip? I think it might be useful to shutdown the system in a
> > user-friendly way.
> 
> When I use the critical trip, the following event occur[1].
> But, I guess that this temperature is not correct temperature
> because after completing the kernel booting, the temperature of big.LITTLE/G3D
> are normal when checking the /sys/class/thermal/thermal_zoneX/temp right 
> after booting.
> - Maintain a uniform temperature(38 ~ 45 millicelsius) right after kernel 
> booting.
> 
> I guess that the critical interrupt may occur before initializing the exynos 
> tmu.
> But, I don't spend the many time to check the exynos-tmu.c driver.
> 
> [1]
> [  445.122122] thermal thermal_zone0: critical temperature reached(108 
> C),shutting down
> [  445.122399] exynos-tmu 1006.tmu: Temperature sensor ID: 0xa
> [  445.122588] exynos-tmu 1006.tmu: Calibration type is 2-point 
> calibration
> [  445.127942] reboot: Failed to start orderly shutdown: forcing the issue
> [  445.134586] Emergency Sync complete
> [1.097954] reboot: Power down

I understand. Apparently the exynos-tmu driver needs some fixes for
this race. Skipping critical then makes sense.

> 
> > 
> >> +  };
> >> +
> >> +  cooling-maps {
> >> +  map0 {
> >> +  /* Set maximum frequency as 1800MHz  */
> >> +  trip = <_alert_0>;
> >> +  cooling-device = < 1 1>;
> > 
> > Out of curiosity: why choosing specific cooling level (so quite fast
> > the device will slow down) instead of letting cooling framework to
> > decide how much to cool? Any particular reason behind this?
> 
> This cooling level is just default value in cooling-maps.
> This value is able to overwrite on dts file. 
> 
> And the thermal subsystem support the cpu cooling features
> with 'cooling-maps'.
> 
> Also, when I tested the performance and stress test
> with GLBenchmark, the temperature of big.LITTLE cores/G3D
> reach easily the critical temperature with 8 online cores.
> So, I add the cooling level

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Sylwester,

On 2016년 08월 16일 19:50, Sylwester Nawrocki wrote:
> Hi Chanwoo,
> 
> On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
> 
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
>> 
> 
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
>> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> new file mode 100644
>> index ..2a5b05744533
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -0,0 +1,1580 @@
> 
>> +
>> +/ {
>> +compatible = "samsung,exynos5433";
>> +#address-cells = <2>;
>> +#size-cells = <2>;
> 
>> +soc: soc {
>> +compatible = "simple-bus";
>> +#address-cells = <1>;
>> +#size-cells = <1>;
>> +ranges = <0x0 0x0 0x0 0x1800>;
> 
>> +lpass: lpass@1140 {
>> +compatible = "samsung,exynos5433-lpass";
>> +reg = <0x1140 0x100>;
>> +samsung,pmu-syscon = <_system_controller>;
>> +status = "disabled";
>> +};
>> +
>> +i2s0: i2s0@1144 {
>> +compatible = "samsung,exynos7-i2s";
>> +reg = <0x1144 0x100>;
>> +dmas = < 0  2>;
>> +dma-names = "tx", "rx";
>> +interrupts = <0 70 0>;
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +clocks = <_aud CLK_PCLK_AUD_I2S>,
>> + <_aud CLK_SCLK_AUD_I2S>,
>> + <_aud CLK_SCLK_I2S_BCLK>;
>> +clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_bus>;
>> +status = "disabled";
>> +};
> 
>> +serial_3: serial@1146 {
>> +compatible = "samsung,exynos5433-uart";
>> +reg = <0x1146 0x100>;
>> +interrupts = <0 67 0>;
>> +clocks = <_aud CLK_PCLK_AUD_UART>,
>> +<_aud CLK_SCLK_AUD_UART>;
>> +clock-names = "uart", "clk_uart_baud0";
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_aud_bus>;
>> +status = "disabled";
>> +};
>> +
> 
>> +amba {
>> +compatible = "arm,amba-bus";
>> +#address-cells = <1>;
>> +#size-cells = <1>;
>> +ranges;
> 
>> +adma: adma@1142 {
>> +compatible = "arm,pl330", "arm,primecell";
>> +reg = <0x1142 0x1000>;
>> +interrupts = <0 73 0>;
>> +clocks = <_aud CLK_ACLK_DMAC>;
>> +clock-names = "apb_pclk";
>> +#dma-cells = <1>;
>> +#dma-channels = <8>;
>> +#dma-requests = <32>;
>> +};
>> +};
>> +};
> 
> The latest Exynos5433 Audio Subsystem bindings look like this
> https://git.linuxtv.org/snawrocki/samsung.git/commit/?h=for-v4.9/mfd/exynos-lpass-v5=104cc6ad3ecc7c4c8ecf73663b93eb48b78f35aa
> i.e. adma@1142, i2s0@1144, serial@1146 should be subnodes of
> the lpass@1140 node.

OK. I'll use your latest patches for sound and then test it again.

Regards,
Chanwoo Choi

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Sylwester,

On 2016년 08월 16일 19:50, Sylwester Nawrocki wrote:
> Hi Chanwoo,
> 
> On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
> 
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
>> 
> 
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
>> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> new file mode 100644
>> index ..2a5b05744533
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -0,0 +1,1580 @@
> 
>> +
>> +/ {
>> +compatible = "samsung,exynos5433";
>> +#address-cells = <2>;
>> +#size-cells = <2>;
> 
>> +soc: soc {
>> +compatible = "simple-bus";
>> +#address-cells = <1>;
>> +#size-cells = <1>;
>> +ranges = <0x0 0x0 0x0 0x1800>;
> 
>> +lpass: lpass@1140 {
>> +compatible = "samsung,exynos5433-lpass";
>> +reg = <0x1140 0x100>;
>> +samsung,pmu-syscon = <_system_controller>;
>> +status = "disabled";
>> +};
>> +
>> +i2s0: i2s0@1144 {
>> +compatible = "samsung,exynos7-i2s";
>> +reg = <0x1144 0x100>;
>> +dmas = < 0  2>;
>> +dma-names = "tx", "rx";
>> +interrupts = <0 70 0>;
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +clocks = <_aud CLK_PCLK_AUD_I2S>,
>> + <_aud CLK_SCLK_AUD_I2S>,
>> + <_aud CLK_SCLK_I2S_BCLK>;
>> +clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_bus>;
>> +status = "disabled";
>> +};
> 
>> +serial_3: serial@1146 {
>> +compatible = "samsung,exynos5433-uart";
>> +reg = <0x1146 0x100>;
>> +interrupts = <0 67 0>;
>> +clocks = <_aud CLK_PCLK_AUD_UART>,
>> +<_aud CLK_SCLK_AUD_UART>;
>> +clock-names = "uart", "clk_uart_baud0";
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_aud_bus>;
>> +status = "disabled";
>> +};
>> +
> 
>> +amba {
>> +compatible = "arm,amba-bus";
>> +#address-cells = <1>;
>> +#size-cells = <1>;
>> +ranges;
> 
>> +adma: adma@1142 {
>> +compatible = "arm,pl330", "arm,primecell";
>> +reg = <0x1142 0x1000>;
>> +interrupts = <0 73 0>;
>> +clocks = <_aud CLK_ACLK_DMAC>;
>> +clock-names = "apb_pclk";
>> +#dma-cells = <1>;
>> +#dma-channels = <8>;
>> +#dma-requests = <32>;
>> +};
>> +};
>> +};
> 
> The latest Exynos5433 Audio Subsystem bindings look like this
> https://git.linuxtv.org/snawrocki/samsung.git/commit/?h=for-v4.9/mfd/exynos-lpass-v5=104cc6ad3ecc7c4c8ecf73663b93eb48b78f35aa
> i.e. adma@1142, i2s0@1144, serial@1146 should be subnodes of
> the lpass@1140 node.

OK. I'll use your latest patches for sound and then test it again.

Regards,
Chanwoo Choi

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Krzysztof,

On 2016년 08월 16일 19:29, Krzysztof Kozlowski wrote:
> Hi Chanwoo,
> 
> Thanks for the patch and for squashing all contributions into one. I
> know that this removes individuals from authors but it makes development
> consistent. Of course I don't mind splitting things if they are sent
> separately following convention of "release early, release often".
> 
> I have just few minor nits, nothing important. I'll review the boards a
> little bit later because of other taks.
> 
> On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
>>
>> This patch includes following Device Tree node to support Exynos5433 SoC:
>> 1. Octa cores for big.LITTLE architecture
>> - Cortex-A53 LITTLE Quad-core
>> - Cortex-A57 big Quad-core
>> - Support PSCI v0.1
>>
>> 2. Clock controller node
>> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
>> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
>> - CMU_MIF   : clocks for DRAM Memory Controller
>> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
>> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
>> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
>> - CMU_G2D   : clocks for G2D/MDMA
>> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
>> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
>> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
>> - CMU_G3D   : clocks for 3D Graphics Engine
>> - CMU_GSCL  : clocks for GSCALER
>> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
>> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>>   CoreSight and L2 cache controller.
>> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
>> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
>> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
>> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
>> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
>> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
>>
>> 3. pinctrl node for GPIO
>> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
>>
>> 4. Timer
>> - ARM architecture timer (armv8-timer)
>> - MCT (Multi Core Timer) timer
>>
>> 5. Interrupt controller (GIC-400)
>>
>> 6. BUS devices
>> - HS-I2C (High-Speed I2C) device
>> - SPI (Serial Peripheral Interface) device
>>
>> 7. Sound devices
>> - I2S bus
>> - LPASS (Low Power Audio Subsystem)
>>
>> 8. Power management devices
>> - CPUFREQ for for Cortex-A53/A57
>> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
>>
>> 9. Display controller devices
>> - DECON (Display and enhancement controller) for panel output
>> - DSI (Display Serial Interface)
>> - MIC (Mobile Image Compressor)
>> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
>>
>> 10. USB
>> - USB 3.0 DRD (Dual Role Device) controller
>> - USB 3.0 Host controller
>>
>> 11. Storage devices
>> - MSHC (Mobile Stoarage Host Controller)
>>
>> 12. Misc devices
>> - UART device
>> - ADC (Analog Digital Converter)
>> - PWM (Pulse Width Modulation)
>> - ADMA (Advanced DMA) and PDMA (Peripheral DMA)
>>
>> Signed-off-by: Chanwoo Choi 
>> Signed-off-by: Jaehoon Chung 
>> Signed-off-by: Seung-Woo Kim 
>> Signed-off-by: Joonyoung Shim 
>> Signed-off-by: Inki Dae 
>> Signed-off-by: Jonghwa Lee 
>> Signed-off-by: Beomho Seo 
>> Signed-off-by: Jaewon Kim 
>> Signed-off-by: Hyungwon Hwang 
>> Signed-off-by: Inha Song 
>> Signed-off-by: Ingi kim 
>> Signed-off-by: Krzysztof Kozlowski 
>> Signed-off-by: Marek Szyprowski 
>> Signed-off-by: Andrzej Hajda 
>> Signed-off-by: Sylwester Nawrocki 
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
>>  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
>>  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
>>  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
>> 
>>  5 files changed, 2725 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>>  create mode 100644 
>> arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
>>  create mode 100644 
>> arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>
>> diff --git

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

Hi Krzysztof,

On 2016년 08월 16일 19:29, Krzysztof Kozlowski wrote:
> Hi Chanwoo,
> 
> Thanks for the patch and for squashing all contributions into one. I
> know that this removes individuals from authors but it makes development
> consistent. Of course I don't mind splitting things if they are sent
> separately following convention of "release early, release often".
> 
> I have just few minor nits, nothing important. I'll review the boards a
> little bit later because of other taks.
> 
> On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
>>
>> This patch includes following Device Tree node to support Exynos5433 SoC:
>> 1. Octa cores for big.LITTLE architecture
>> - Cortex-A53 LITTLE Quad-core
>> - Cortex-A57 big Quad-core
>> - Support PSCI v0.1
>>
>> 2. Clock controller node
>> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
>> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
>> - CMU_MIF   : clocks for DRAM Memory Controller
>> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
>> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
>> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
>> - CMU_G2D   : clocks for G2D/MDMA
>> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
>> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
>> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
>> - CMU_G3D   : clocks for 3D Graphics Engine
>> - CMU_GSCL  : clocks for GSCALER
>> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
>> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>>   CoreSight and L2 cache controller.
>> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
>> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
>> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
>> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
>> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
>> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
>>
>> 3. pinctrl node for GPIO
>> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
>>
>> 4. Timer
>> - ARM architecture timer (armv8-timer)
>> - MCT (Multi Core Timer) timer
>>
>> 5. Interrupt controller (GIC-400)
>>
>> 6. BUS devices
>> - HS-I2C (High-Speed I2C) device
>> - SPI (Serial Peripheral Interface) device
>>
>> 7. Sound devices
>> - I2S bus
>> - LPASS (Low Power Audio Subsystem)
>>
>> 8. Power management devices
>> - CPUFREQ for for Cortex-A53/A57
>> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
>>
>> 9. Display controller devices
>> - DECON (Display and enhancement controller) for panel output
>> - DSI (Display Serial Interface)
>> - MIC (Mobile Image Compressor)
>> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
>>
>> 10. USB
>> - USB 3.0 DRD (Dual Role Device) controller
>> - USB 3.0 Host controller
>>
>> 11. Storage devices
>> - MSHC (Mobile Stoarage Host Controller)
>>
>> 12. Misc devices
>> - UART device
>> - ADC (Analog Digital Converter)
>> - PWM (Pulse Width Modulation)
>> - ADMA (Advanced DMA) and PDMA (Peripheral DMA)
>>
>> Signed-off-by: Chanwoo Choi 
>> Signed-off-by: Jaehoon Chung 
>> Signed-off-by: Seung-Woo Kim 
>> Signed-off-by: Joonyoung Shim 
>> Signed-off-by: Inki Dae 
>> Signed-off-by: Jonghwa Lee 
>> Signed-off-by: Beomho Seo 
>> Signed-off-by: Jaewon Kim 
>> Signed-off-by: Hyungwon Hwang 
>> Signed-off-by: Inha Song 
>> Signed-off-by: Ingi kim 
>> Signed-off-by: Krzysztof Kozlowski 
>> Signed-off-by: Marek Szyprowski 
>> Signed-off-by: Andrzej Hajda 
>> Signed-off-by: Sylwester Nawrocki 
>> ---
>>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
>>  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
>>  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
>>  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
>>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
>> 
>>  5 files changed, 2725 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>>  create mode 100644 
>> arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
>>  create mode 100644 
>> arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
>> b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>> new file mode 100644
>> index ..2bf94face3f7
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>> @@ -0,0 +1,794 @@
>> +/*
>> + * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
>> + *
>> + * Copyright (c) 2016

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Sylwester Nawrocki

Hi Chanwoo,

On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.

> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
> 

> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> new file mode 100644
> index ..2a5b05744533
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -0,0 +1,1580 @@

> +
> +/ {
> + compatible = "samsung,exynos5433";
> + #address-cells = <2>;
> + #size-cells = <2>;

> + soc: soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x0 0x1800>;

> + lpass: lpass@1140 {
> + compatible = "samsung,exynos5433-lpass";
> + reg = <0x1140 0x100>;
> + samsung,pmu-syscon = <_system_controller>;
> + status = "disabled";
> + };
> +
> + i2s0: i2s0@1144 {
> + compatible = "samsung,exynos7-i2s";
> + reg = <0x1144 0x100>;
> + dmas = < 0  2>;
> + dma-names = "tx", "rx";
> + interrupts = <0 70 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <_aud CLK_PCLK_AUD_I2S>,
> +  <_aud CLK_SCLK_AUD_I2S>,
> +  <_aud CLK_SCLK_I2S_BCLK>;
> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
> + pinctrl-names = "default";
> + pinctrl-0 = <_bus>;
> + status = "disabled";
> + };

> + serial_3: serial@1146 {
> + compatible = "samsung,exynos5433-uart";
> + reg = <0x1146 0x100>;
> + interrupts = <0 67 0>;
> + clocks = <_aud CLK_PCLK_AUD_UART>,
> + <_aud CLK_SCLK_AUD_UART>;
> + clock-names = "uart", "clk_uart_baud0";
> + pinctrl-names = "default";
> + pinctrl-0 = <_aud_bus>;
> + status = "disabled";
> + };
> +

> + amba {
> + compatible = "arm,amba-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;

> + adma: adma@1142 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x1142 0x1000>;
> + interrupts = <0 73 0>;
> + clocks = <_aud CLK_ACLK_DMAC>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> + };
> + };

The latest Exynos5433 Audio Subsystem bindings look like this
https://git.linuxtv.org/snawrocki/samsung.git/commit/?h=for-v4.9/mfd/exynos-lpass-v5=104cc6ad3ecc7c4c8ecf73663b93eb48b78f35aa
i.e. adma@1142, i2s0@1144, serial@1146 should be subnodes of
the lpass@1140 node.

-- 
Thanks,
Sylwester

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Sylwester Nawrocki

Hi Chanwoo,

On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.

> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
> 

> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> new file mode 100644
> index ..2a5b05744533
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -0,0 +1,1580 @@

> +
> +/ {
> + compatible = "samsung,exynos5433";
> + #address-cells = <2>;
> + #size-cells = <2>;

> + soc: soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x0 0x1800>;

> + lpass: lpass@1140 {
> + compatible = "samsung,exynos5433-lpass";
> + reg = <0x1140 0x100>;
> + samsung,pmu-syscon = <_system_controller>;
> + status = "disabled";
> + };
> +
> + i2s0: i2s0@1144 {
> + compatible = "samsung,exynos7-i2s";
> + reg = <0x1144 0x100>;
> + dmas = < 0  2>;
> + dma-names = "tx", "rx";
> + interrupts = <0 70 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <_aud CLK_PCLK_AUD_I2S>,
> +  <_aud CLK_SCLK_AUD_I2S>,
> +  <_aud CLK_SCLK_I2S_BCLK>;
> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
> + pinctrl-names = "default";
> + pinctrl-0 = <_bus>;
> + status = "disabled";
> + };

> + serial_3: serial@1146 {
> + compatible = "samsung,exynos5433-uart";
> + reg = <0x1146 0x100>;
> + interrupts = <0 67 0>;
> + clocks = <_aud CLK_PCLK_AUD_UART>,
> + <_aud CLK_SCLK_AUD_UART>;
> + clock-names = "uart", "clk_uart_baud0";
> + pinctrl-names = "default";
> + pinctrl-0 = <_aud_bus>;
> + status = "disabled";
> + };
> +

> + amba {
> + compatible = "arm,amba-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;

> + adma: adma@1142 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x1142 0x1000>;
> + interrupts = <0 73 0>;
> + clocks = <_aud CLK_ACLK_DMAC>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> + };
> + };

The latest Exynos5433 Audio Subsystem bindings look like this
https://git.linuxtv.org/snawrocki/samsung.git/commit/?h=for-v4.9/mfd/exynos-lpass-v5=104cc6ad3ecc7c4c8ecf73663b93eb48b78f35aa
i.e. adma@1142, i2s0@1144, serial@1146 should be subnodes of
the lpass@1140 node.

-- 
Thanks,
Sylwester

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Krzysztof Kozlowski

Hi Chanwoo,

Thanks for the patch and for squashing all contributions into one. I
know that this removes individuals from authors but it makes development
consistent. Of course I don't mind splitting things if they are sent
separately following convention of "release early, release often".

I have just few minor nits, nothing important. I'll review the boards a
little bit later because of other taks.

On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.
> 
> This patch includes following Device Tree node to support Exynos5433 SoC:
> 1. Octa cores for big.LITTLE architecture
> - Cortex-A53 LITTLE Quad-core
> - Cortex-A57 big Quad-core
> - Support PSCI v0.1
> 
> 2. Clock controller node
> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
> - CMU_MIF   : clocks for DRAM Memory Controller
> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
> - CMU_G2D   : clocks for G2D/MDMA
> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
> - CMU_G3D   : clocks for 3D Graphics Engine
> - CMU_GSCL  : clocks for GSCALER
> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>   CoreSight and L2 cache controller.
> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
> 
> 3. pinctrl node for GPIO
> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
> 
> 4. Timer
> - ARM architecture timer (armv8-timer)
> - MCT (Multi Core Timer) timer
> 
> 5. Interrupt controller (GIC-400)
> 
> 6. BUS devices
> - HS-I2C (High-Speed I2C) device
> - SPI (Serial Peripheral Interface) device
> 
> 7. Sound devices
> - I2S bus
> - LPASS (Low Power Audio Subsystem)
> 
> 8. Power management devices
> - CPUFREQ for for Cortex-A53/A57
> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
> 
> 9. Display controller devices
> - DECON (Display and enhancement controller) for panel output
> - DSI (Display Serial Interface)
> - MIC (Mobile Image Compressor)
> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
> 
> 10. USB
> - USB 3.0 DRD (Dual Role Device) controller
> - USB 3.0 Host controller
> 
> 11. Storage devices
> - MSHC (Mobile Stoarage Host Controller)
> 
> 12. Misc devices
> - UART device
> - ADC (Analog Digital Converter)
> - PWM (Pulse Width Modulation)
> - ADMA (Advanced DMA) and PDMA (Peripheral DMA)
> 
> Signed-off-by: Chanwoo Choi 
> Signed-off-by: Jaehoon Chung 
> Signed-off-by: Seung-Woo Kim 
> Signed-off-by: Joonyoung Shim 
> Signed-off-by: Inki Dae 
> Signed-off-by: Jonghwa Lee 
> Signed-off-by: Beomho Seo 
> Signed-off-by: Jaewon Kim 
> Signed-off-by: Hyungwon Hwang 
> Signed-off-by: Inha Song 
> Signed-off-by: Ingi kim 
> Signed-off-by: Krzysztof Kozlowski 
> Signed-off-by: Marek Szyprowski 
> Signed-off-by: Andrzej Hajda 
> Signed-off-by: Sylwester Nawrocki 
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
>  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
>  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
>  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
> 
>  5 files changed, 2725 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>  create mode 100644 
> arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> new file mode 100644
> index ..2bf94face3f7
> --- /dev/null
> +++

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Krzysztof Kozlowski

Hi Chanwoo,

Thanks for the patch and for squashing all contributions into one. I
know that this removes individuals from authors but it makes development
consistent. Of course I don't mind splitting things if they are sent
separately following convention of "release early, release often".

I have just few minor nits, nothing important. I'll review the boards a
little bit later because of other taks.

On 08/16/2016 08:35 AM, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.
> 
> This patch includes following Device Tree node to support Exynos5433 SoC:
> 1. Octa cores for big.LITTLE architecture
> - Cortex-A53 LITTLE Quad-core
> - Cortex-A57 big Quad-core
> - Support PSCI v0.1
> 
> 2. Clock controller node
> - CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
> - CMU_CPIF  : clocks for LLI (Low Latency Interface)
> - CMU_MIF   : clocks for DRAM Memory Controller
> - CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
> - CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
> - CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
> - CMU_G2D   : clocks for G2D/MDMA
> - CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
> - CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
> - CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
> - CMU_G3D   : clocks for 3D Graphics Engine
> - CMU_GSCL  : clocks for GSCALER
> - CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
> - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
>   CoreSight and L2 cache controller.
> - CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
> - CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
> - CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
> - CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
> - CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
> - CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
> 
> 3. pinctrl node for GPIO
> - alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
> 
> 4. Timer
> - ARM architecture timer (armv8-timer)
> - MCT (Multi Core Timer) timer
> 
> 5. Interrupt controller (GIC-400)
> 
> 6. BUS devices
> - HS-I2C (High-Speed I2C) device
> - SPI (Serial Peripheral Interface) device
> 
> 7. Sound devices
> - I2S bus
> - LPASS (Low Power Audio Subsystem)
> 
> 8. Power management devices
> - CPUFREQ for for Cortex-A53/A57
> - TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
> 
> 9. Display controller devices
> - DECON (Display and enhancement controller) for panel output
> - DSI (Display Serial Interface)
> - MIC (Mobile Image Compressor)
> - IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC
> 
> 10. USB
> - USB 3.0 DRD (Dual Role Device) controller
> - USB 3.0 Host controller
> 
> 11. Storage devices
> - MSHC (Mobile Stoarage Host Controller)
> 
> 12. Misc devices
> - UART device
> - ADC (Analog Digital Converter)
> - PWM (Pulse Width Modulation)
> - ADMA (Advanced DMA) and PDMA (Peripheral DMA)
> 
> Signed-off-by: Chanwoo Choi 
> Signed-off-by: Jaehoon Chung 
> Signed-off-by: Seung-Woo Kim 
> Signed-off-by: Joonyoung Shim 
> Signed-off-by: Inki Dae 
> Signed-off-by: Jonghwa Lee 
> Signed-off-by: Beomho Seo 
> Signed-off-by: Jaewon Kim 
> Signed-off-by: Hyungwon Hwang 
> Signed-off-by: Inha Song 
> Signed-off-by: Ingi kim 
> Signed-off-by: Krzysztof Kozlowski 
> Signed-off-by: Marek Szyprowski 
> Signed-off-by: Andrzej Hajda 
> Signed-off-by: Sylwester Nawrocki 
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
>  .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
>  .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
>  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
> 
>  5 files changed, 2725 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
>  create mode 100644 
> arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
> b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> new file mode 100644
> index ..2bf94face3f7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -0,0 +1,794 @@
> +/*
> + * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
> + *
> + * Copyright (c) 2016 Samsung Electronics Co., Ltd.
> + * Chanwoo Choi 
> + *
> + * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as 
> device
> + * tree nodes are listed in this file.
> + *
>

[PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.

This patch includes following Device Tree node to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Support PSCI v0.1

2. Clock controller node
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
  CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. pinctrl node for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. Timer
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer

5. Interrupt controller (GIC-400)

6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device

7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)

8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP

9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)
- IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC

10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller

11. Storage devices
- MSHC (Mobile Stoarage Host Controller)

12. Misc devices
- UART device
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)

Signed-off-by: Chanwoo Choi 
Signed-off-by: Jaehoon Chung 
Signed-off-by: Seung-Woo Kim 
Signed-off-by: Joonyoung Shim 
Signed-off-by: Inki Dae 
Signed-off-by: Jonghwa Lee 
Signed-off-by: Beomho Seo 
Signed-off-by: Jaewon Kim 
Signed-off-by: Hyungwon Hwang 
Signed-off-by: Inha Song 
Signed-off-by: Ingi kim 
Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Marek Szyprowski 
Signed-off-by: Andrzej Hajda 
Signed-off-by: Sylwester Nawrocki 
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
 .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
 .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
 5 files changed, 2725 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
 create mode 100644 
arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
new file mode 100644
index ..2bf94face3f7
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -0,0 +1,794 @@
+/*
+ * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * Chanwoo Choi 
+ *
+ * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define PIN_PULL_NONE  0
+#define PIN_PULL_DOWN  1
+#define PIN_PULL_UP3
+

[PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

2016-08-16 Thread Chanwoo Choi

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.

This patch includes following Device Tree node to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Support PSCI v0.1

2. Clock controller node
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
  CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. pinctrl node for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. Timer
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer

5. Interrupt controller (GIC-400)

6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device

7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)

8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP

9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)
- IOMMU for GSCL/DECON/TV/MFC/JPEG/FLITE/3AA/FIMC

10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller

11. Storage devices
- MSHC (Mobile Stoarage Host Controller)

12. Misc devices
- UART device
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)

Signed-off-by: Chanwoo Choi 
Signed-off-by: Jaehoon Chung 
Signed-off-by: Seung-Woo Kim 
Signed-off-by: Joonyoung Shim 
Signed-off-by: Inki Dae 
Signed-off-by: Jonghwa Lee 
Signed-off-by: Beomho Seo 
Signed-off-by: Jaewon Kim 
Signed-off-by: Hyungwon Hwang 
Signed-off-by: Inha Song 
Signed-off-by: Ingi kim 
Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Marek Szyprowski 
Signed-off-by: Andrzej Hajda 
Signed-off-by: Sylwester Nawrocki 
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  794 ++
 .../dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi |   23 +
 .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |   22 +
 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi |  306 
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1580 
 5 files changed, 2725 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
 create mode 100644 
arch/arm64/boot/dts/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
new file mode 100644
index ..2bf94face3f7
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -0,0 +1,794 @@
+/*
+ * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * Chanwoo Choi 
+ *
+ * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define PIN_PULL_NONE  0
+#define PIN_PULL_DOWN  1
+#define PIN_PULL_UP3
+
+#define PIN_DRV_LV10
+#define PIN_DRV_LV22
+#define PIN_DRV_LV31
+#define PIN_DRV_LV43
+
+#define PIN_IN 0
+#define PIN_OUT1
+#define PIN_FUNC1  2
+
+#define PIN(_func, _pin, _pull, _drv)  \
+   _pin {  \
+

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

Re: [PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

[PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

[PATCH 5/7] arm64: dts: exynos: Add dts files for Samsung Exynos5433 64bit SoC

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