Hi Laurent,
On 15/02/18 14:16, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
>> From: Kieran Bingham
>>
>> Provide a device node for the ADV7511 as found on the Draak D3
Hi Laurent,
On 15/02/18 14:16, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
>> From: Kieran Bingham
>>
>> Provide a device node for the ADV7511 as found on the Draak D3 platform.
>>
>> The ADV7511 is
On Thu, Feb 15, 2018 at 04:16:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> > From: Kieran Bingham
> >
> > Provide a device node for the ADV7511 as found on
On Thu, Feb 15, 2018 at 04:16:00PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> > From: Kieran Bingham
> >
> > Provide a device node for the ADV7511 as found on the Draak D3 platform.
> >
> >
Hi Kieran,
Thank you for the patch.
On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> From: Kieran Bingham
>
> Provide a device node for the ADV7511 as found on the Draak D3 platform.
>
> The ADV7511 is connected to the DU through a parallel
Hi Kieran,
Thank you for the patch.
On Thursday, 15 February 2018 10:38:22 EET Kieran Bingham wrote:
> From: Kieran Bingham
>
> Provide a device node for the ADV7511 as found on the Draak D3 platform.
>
> The ADV7511 is connected to the DU through a parallel mux chip, and is
> configurable in
From: Kieran Bingham
Provide a device node for the ADV7511 as found on the Draak D3 platform.
The ADV7511 is connected to the DU through a parallel mux chip, and is
configurable in hardware whether it is connected to LVDS0 or LVDS1.
Connect through to LVDS0 as
From: Kieran Bingham
Provide a device node for the ADV7511 as found on the Draak D3 platform.
The ADV7511 is connected to the DU through a parallel mux chip, and is
configurable in hardware whether it is connected to LVDS0 or LVDS1.
Connect through to LVDS0 as a default implementation.
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