On Fri, Dec 15, 2017 at 2:54 PM, Thomas Gleixner wrote:
> On Tue, 12 Dec 2017, Andy Lutomirski wrote:
>> +/* This is a multiple of PAGE_SIZE. */
>> +#define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE)
>> +
>> +static void *ldt_slot_va(int slot)
>
> How is that supposed to
On Fri, Dec 15, 2017 at 2:54 PM, Thomas Gleixner wrote:
> On Tue, 12 Dec 2017, Andy Lutomirski wrote:
>> +/* This is a multiple of PAGE_SIZE. */
>> +#define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE)
>> +
>> +static void *ldt_slot_va(int slot)
>
> How is that supposed to compile w/o warnings?
On Tue, 12 Dec 2017, Andy Lutomirski wrote:
> +
> + return 0;
> +#else
> + return -EINVAL;
Errm. What's the point of that? Breaking non PTI?
> new_ldt = alloc_ldt_struct(old_mm->context.ldt->nr_entries);
> if (!new_ldt) {
> @@ -155,8 +266,17 @@ int init_new_context_ldt(struct
On Tue, 12 Dec 2017, Andy Lutomirski wrote:
> +
> + return 0;
> +#else
> + return -EINVAL;
Errm. What's the point of that? Breaking non PTI?
> new_ldt = alloc_ldt_struct(old_mm->context.ldt->nr_entries);
> if (!new_ldt) {
> @@ -155,8 +266,17 @@ int init_new_context_ldt(struct
On Tue, 12 Dec 2017, Andy Lutomirski wrote:
> +/* This is a multiple of PAGE_SIZE. */
> +#define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE)
> +
> +static void *ldt_slot_va(int slot)
How is that supposed to compile w/o warnings? Want's to be inline
Thanks,
tglx
On Tue, 12 Dec 2017, Andy Lutomirski wrote:
> +/* This is a multiple of PAGE_SIZE. */
> +#define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE)
> +
> +static void *ldt_slot_va(int slot)
How is that supposed to compile w/o warnings? Want's to be inline
Thanks,
tglx
With PTI on, we need the LDT to be in the usermode tables somewhere,
and the LDT is per-mm.
tglx had a hack to have a per-cpu LDT and context switch it, but it
was probably insanely slow due to the required TLB flushes.
Instead, take advantage of the fact that we have an address space
hole that
With PTI on, we need the LDT to be in the usermode tables somewhere,
and the LDT is per-mm.
tglx had a hack to have a per-cpu LDT and context switch it, but it
was probably insanely slow due to the required TLB flushes.
Instead, take advantage of the fact that we have an address space
hole that
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