On 25-10-16, 16:13, Dave Gerlach wrote:
> I think what you have shared below is a good safety check but if I rename
> the regulator properties in the DT for the cpu (to vdd and vbb, meaning
> cpufreq detects no regulator) and do *not* call dev_pm_opp_set_regulators
> before cpufreq-dt probes we
On 25-10-16, 16:13, Dave Gerlach wrote:
> I think what you have shared below is a good safety check but if I rename
> the regulator properties in the DT for the cpu (to vdd and vbb, meaning
> cpufreq detects no regulator) and do *not* call dev_pm_opp_set_regulators
> before cpufreq-dt probes we
Hi,
On 10/23/2016 11:26 PM, Viresh Kumar wrote:
On 23-10-16, 20:08, Dave Gerlach wrote:
Overall this series looks good to me apart from a few small things. Most
importantly I was able to get a working implementation using two regulators
on ti dra7xx platform with proper sequencing built on top
Hi,
On 10/23/2016 11:26 PM, Viresh Kumar wrote:
On 23-10-16, 20:08, Dave Gerlach wrote:
Overall this series looks good to me apart from a few small things. Most
importantly I was able to get a working implementation using two regulators
on ti dra7xx platform with proper sequencing built on top
On 23-10-16, 20:08, Dave Gerlach wrote:
> Overall this series looks good to me apart from a few small things. Most
> importantly I was able to get a working implementation using two regulators
> on ti dra7xx platform with proper sequencing built on top of this series. We
> have cpu regulator and
On 23-10-16, 20:08, Dave Gerlach wrote:
> Overall this series looks good to me apart from a few small things. Most
> importantly I was able to get a working implementation using two regulators
> on ti dra7xx platform with proper sequencing built on top of this series. We
> have cpu regulator and
Hi,
On 10/21/2016 10:40 AM, Viresh Kumar wrote:
On 21 October 2016 at 19:09, Rafael J. Wysocki wrote:
On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar wrote:
Hi,
Some platforms (like TI) have complex DVFS configuration for CPU
devices, where
Hi,
On 10/21/2016 10:40 AM, Viresh Kumar wrote:
On 21 October 2016 at 19:09, Rafael J. Wysocki wrote:
On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar wrote:
Hi,
Some platforms (like TI) have complex DVFS configuration for CPU
devices, where multiple regulators are required to be configured
On 21 October 2016 at 19:09, Rafael J. Wysocki wrote:
> On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar
> wrote:
>> Hi,
>>
>> Some platforms (like TI) have complex DVFS configuration for CPU
>> devices, where multiple regulators are required to be
On 21 October 2016 at 19:09, Rafael J. Wysocki wrote:
> On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar
> wrote:
>> Hi,
>>
>> Some platforms (like TI) have complex DVFS configuration for CPU
>> devices, where multiple regulators are required to be configured to
>> change DVFS state of the
On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar wrote:
> Hi,
>
> Some platforms (like TI) have complex DVFS configuration for CPU
> devices, where multiple regulators are required to be configured to
> change DVFS state of the device. This was explained well by Nishanth
>
On Thu, Oct 20, 2016 at 10:44 AM, Viresh Kumar wrote:
> Hi,
>
> Some platforms (like TI) have complex DVFS configuration for CPU
> devices, where multiple regulators are required to be configured to
> change DVFS state of the device. This was explained well by Nishanth
> earlier [1].
>
> Some
Hi,
Some platforms (like TI) have complex DVFS configuration for CPU
devices, where multiple regulators are required to be configured to
change DVFS state of the device. This was explained well by Nishanth
earlier [1].
Some thoughts went into it few months back but then it all got lost. I
am
Hi,
Some platforms (like TI) have complex DVFS configuration for CPU
devices, where multiple regulators are required to be configured to
change DVFS state of the device. This was explained well by Nishanth
earlier [1].
Some thoughts went into it few months back but then it all got lost. I
am
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