On Tuesday, September 13, 2016 2:31:13 PM CEST zhichang wrote:
> >
> > What are the other LPC cycle types that could be supported?
> O. memory and firmware operations are supported too. But at this moment, we
> only use IO cycle.
What are firmware operations?
Are the memory operations directly
On Tuesday, September 13, 2016 2:31:13 PM CEST zhichang wrote:
> >
> > What are the other LPC cycle types that could be supported?
> O. memory and firmware operations are supported too. But at this moment, we
> only use IO cycle.
What are firmware operations?
Are the memory operations directly
On 2016年09月08日 18:00, Arnd Bergmann wrote:
> On Thursday, September 8, 2016 4:06:01 PM CEST zhichang.yuan wrote:
>>>
+struct lpc_io_ops {
+unsigned int periosz;
+int (*lpc_iord)(struct hisilpc_dev *pdev, struct lpc_cycle_para *para,
+
On 2016年09月08日 18:00, Arnd Bergmann wrote:
> On Thursday, September 8, 2016 4:06:01 PM CEST zhichang.yuan wrote:
>>>
+struct lpc_io_ops {
+unsigned int periosz;
+int (*lpc_iord)(struct hisilpc_dev *pdev, struct lpc_cycle_para *para,
+
On Thursday, September 8, 2016 4:06:01 PM CEST zhichang.yuan wrote:
> >
> >> +struct lpc_io_ops {
> >> +unsigned int periosz;
> >> +int (*lpc_iord)(struct hisilpc_dev *pdev, struct lpc_cycle_para *para,
> >> +unsigned long ptaddr, unsigned char *buf,
> >> +
On Thursday, September 8, 2016 4:06:01 PM CEST zhichang.yuan wrote:
> >
> >> +struct lpc_io_ops {
> >> +unsigned int periosz;
> >> +int (*lpc_iord)(struct hisilpc_dev *pdev, struct lpc_cycle_para *para,
> >> +unsigned long ptaddr, unsigned char *buf,
> >> +
Hi, Arnd
On 2016/9/7 23:27, Arnd Bergmann wrote:
> On Wednesday, September 7, 2016 9:33:51 PM CEST Zhichang Yuan wrote:
>
>> +
>> +struct hisilpc_dev;
>> +
>> +/* This flag is specific to differentiate earlycon operations and the
>> others */
>> +#define FG_EARLYCON_LPC (0x01U <<
Hi, Arnd
On 2016/9/7 23:27, Arnd Bergmann wrote:
> On Wednesday, September 7, 2016 9:33:51 PM CEST Zhichang Yuan wrote:
>
>> +
>> +struct hisilpc_dev;
>> +
>> +/* This flag is specific to differentiate earlycon operations and the
>> others */
>> +#define FG_EARLYCON_LPC (0x01U <<
Hi zhichang.yuan,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.8-rc5 next-20160907]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
[Suggest to use git(>=2.9.0) format-patch --base= (or --base=auto for
convenience)
Hi zhichang.yuan,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.8-rc5 next-20160907]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
[Suggest to use git(>=2.9.0) format-patch --base= (or --base=auto for
convenience)
On Wednesday, September 7, 2016 9:33:51 PM CEST Zhichang Yuan wrote:
> +
> +struct hisilpc_dev;
> +
> +/* This flag is specific to differentiate earlycon operations and the others
> */
> +#define FG_EARLYCON_LPC (0x01U << 0)
> +/*
> + * this bit set means each IO operation will
On Wednesday, September 7, 2016 9:33:51 PM CEST Zhichang Yuan wrote:
> +
> +struct hisilpc_dev;
> +
> +/* This flag is specific to differentiate earlycon operations and the others
> */
> +#define FG_EARLYCON_LPC (0x01U << 0)
> +/*
> + * this bit set means each IO operation will
From: "zhichang.yuan"
On Hip06, the accesses to LPC peripherals work in an indirect way. A
corresponding LPC driver need to configure some registers in LPC master
direclty, then the real accesses on LPC slave devices were finished by the
master controller.
This patch
From: "zhichang.yuan"
On Hip06, the accesses to LPC peripherals work in an indirect way. A
corresponding LPC driver need to configure some registers in LPC master
direclty, then the real accesses on LPC slave devices were finished by the
master controller.
This patch implement the relevant
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