Re: [PATCH V3 2/2] PCI: Add MCFG quirks for Tegra194 host controllers

2021-04-16 Thread Vidya Sagar
On 3/6/2021 3:27 AM, Bjorn Helgaas wrote: External email: Use caution opening links or attachments [+cc Krzysztof for .bus_shift below] This is [2/2] but I don't see a [1/2]. Is there something missing? On Sat, Jan 11, 2020 at 12:45:00AM +0530, Vidya Sagar wrote: The PCIe controller in

Re: [PATCH V3 2/2] PCI: Add MCFG quirks for Tegra194 host controllers

2021-03-05 Thread Krzysztof WilczyƄski
Hi Bjorn and Vidya, [...] > > +} > > + > > +struct pci_ecam_ops tegra194_pcie_ops = { > > + .bus_shift = 20, > > I think e7708f5b10e2 ("PCI: Unify ECAM constants in native PCI Express > drivers") means you don't need this .bus_shift. [...] Correct. If this platform implements ECAM as

Re: [PATCH V3 2/2] PCI: Add MCFG quirks for Tegra194 host controllers

2021-03-05 Thread Bjorn Helgaas
[+cc Krzysztof for .bus_shift below] This is [2/2] but I don't see a [1/2]. Is there something missing? On Sat, Jan 11, 2020 at 12:45:00AM +0530, Vidya Sagar wrote: > The PCIe controller in Tegra194 SoC is not completely ECAM-compliant. > With the current hardware design limitations in place,