Re: [PATCH V3 2/6] usb: serial: f81534: add auto RTS direction support

[Johan Hovold]

On Thu, Jan 11, 2018 at 02:47:16PM +0800, Ji-Ze Hong (Peter Hong) wrote:
> The F81532/534 had auto RTS direction support for RS485 mode.
> We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports.
> There are 4 conditions below:
>   0: F81534_PORT_CONF_RS232.
>   1: F81534_PORT_CONF_RS485.
>   2: value error, default to F81534_PORT_CONF_RS232.
>   3: F81534_PORT_CONF_RS485_INVERT.
> 
> F81532/534 Clock register (offset +08h)
> 
> Bit0: UART Enable (always on)
> Bit2-1:   Clock source selector
>   00: 1.846MHz.
>   01: 18.46MHz.
>   10: 24MHz.
>   11: 14.77MHz.
> Bit4: Auto direction(RTS) control (RTS pin Low when TX)
> Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
> 
> Signed-off-by: Ji-Ze Hong (Peter Hong) 
> ---
> V3:
>   1: change some BIT() operation to GENMASK().
>   2: change some dev_info() to dev_dbg().
> 
> V2:
>   1: Read the configure data from flash and save it to shadow clock
>  register.

Series now applied with a few minor tweaks.

> +#define F81534_PORT_CONF_RS232   0
> +#define F81534_PORT_CONF_RS485   BIT(0)
> +#define F81534_PORT_CONF_RS485_INVERTGENMASK(1, 0)

I replaced GENMASK() with your original (BIT(x) | BIT(y)) for register
values like this one.

>  #define F81534_PORT_CONF_DISABLE_PORTBIT(3)
>  #define F81534_PORT_CONF_NOT_EXIST_PORT  BIT(7)
>  #define F81534_PORT_UNAVAILABLE  \
>   (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
>  
> +#define F81534_UART_MODE_MASKGENMASK(1, 0)

And renamed this mask to F81534_PORT_CONF_MODE_MASK so its more
obvious to what it applies.

Thanks,
Johan

Re: [PATCH V3 2/6] usb: serial: f81534: add auto RTS direction support

[Johan Hovold]

On Thu, Jan 11, 2018 at 02:47:16PM +0800, Ji-Ze Hong (Peter Hong) wrote:
> The F81532/534 had auto RTS direction support for RS485 mode.
> We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports.
> There are 4 conditions below:
>   0: F81534_PORT_CONF_RS232.
>   1: F81534_PORT_CONF_RS485.
>   2: value error, default to F81534_PORT_CONF_RS232.
>   3: F81534_PORT_CONF_RS485_INVERT.
> 
> F81532/534 Clock register (offset +08h)
> 
> Bit0: UART Enable (always on)
> Bit2-1:   Clock source selector
>   00: 1.846MHz.
>   01: 18.46MHz.
>   10: 24MHz.
>   11: 14.77MHz.
> Bit4: Auto direction(RTS) control (RTS pin Low when TX)
> Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
> 
> Signed-off-by: Ji-Ze Hong (Peter Hong) 
> ---
> V3:
>   1: change some BIT() operation to GENMASK().
>   2: change some dev_info() to dev_dbg().
> 
> V2:
>   1: Read the configure data from flash and save it to shadow clock
>  register.

Series now applied with a few minor tweaks.

> +#define F81534_PORT_CONF_RS232   0
> +#define F81534_PORT_CONF_RS485   BIT(0)
> +#define F81534_PORT_CONF_RS485_INVERTGENMASK(1, 0)

I replaced GENMASK() with your original (BIT(x) | BIT(y)) for register
values like this one.

>  #define F81534_PORT_CONF_DISABLE_PORTBIT(3)
>  #define F81534_PORT_CONF_NOT_EXIST_PORT  BIT(7)
>  #define F81534_PORT_UNAVAILABLE  \
>   (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
>  
> +#define F81534_UART_MODE_MASKGENMASK(1, 0)

And renamed this mask to F81534_PORT_CONF_MODE_MASK so its more
obvious to what it applies.

Thanks,
Johan

[PATCH V3 2/6] usb: serial: f81534: add auto RTS direction support

[Ji-Ze Hong (Peter Hong)]

The F81532/534 had auto RTS direction support for RS485 mode.
We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports.
There are 4 conditions below:
0: F81534_PORT_CONF_RS232.
1: F81534_PORT_CONF_RS485.
2: value error, default to F81534_PORT_CONF_RS232.
3: F81534_PORT_CONF_RS485_INVERT.

F81532/534 Clock register (offset +08h)

Bit0:   UART Enable (always on)
Bit2-1: Clock source selector
00: 1.846MHz.
01: 18.46MHz.
10: 24MHz.
11: 14.77MHz.
Bit4:   Auto direction(RTS) control (RTS pin Low when TX)
Bit5:   Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)

Signed-off-by: Ji-Ze Hong (Peter Hong) 
---
V3:
1: change some BIT() operation to GENMASK().
2: change some dev_info() to dev_dbg().

V2:
1: Read the configure data from flash and save it to shadow clock
   register.

 drivers/usb/serial/f81534.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
index 1563d3f34381..2201be577dd3 100644
--- a/drivers/usb/serial/f81534.c
+++ b/drivers/usb/serial/f81534.c
@@ -98,11 +98,16 @@
 
 #define F81534_DEFAULT_BAUD_RATE   9600
 
+#define F81534_PORT_CONF_RS232 0
+#define F81534_PORT_CONF_RS485 BIT(0)
+#define F81534_PORT_CONF_RS485_INVERT  GENMASK(1, 0)
 #define F81534_PORT_CONF_DISABLE_PORT  BIT(3)
 #define F81534_PORT_CONF_NOT_EXIST_PORTBIT(7)
 #define F81534_PORT_UNAVAILABLE\
(F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
 
+#define F81534_UART_MODE_MASK  GENMASK(1, 0)
+
 #define F81534_1X_RXTRIGGER0xc3
 #define F81534_8X_RXTRIGGER0xcf
 
@@ -115,6 +120,8 @@
  * 01: 18.46MHz.
  * 10: 24MHz.
  * 11: 14.77MHz.
+ * Bit4:   Auto direction(RTS) control (RTS pin Low when TX)
+ * Bit5:   Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
  */
 
 #define F81534_UART_EN BIT(0)
@@ -123,6 +130,8 @@
 #define F81534_CLK_24_MHZ  BIT(2)
 #define F81534_CLK_14_77_MHZ   GENMASK(2, 1)
 #define F81534_CLK_MASKGENMASK(2, 1)
+#define F81534_CLK_RS485_MODE  BIT(4)
+#define F81534_CLK_RS485_INVERTBIT(5)
 
 static const struct usb_device_id f81534_id_table[] = {
{ USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
@@ -1274,9 +1283,12 @@ static void f81534_lsr_worker(struct work_struct *work)
 
 static int f81534_port_probe(struct usb_serial_port *port)
 {
+   struct f81534_serial_private *serial_priv;
struct f81534_port_private *port_priv;
int ret;
+   u8 value;
 
+   serial_priv = usb_get_serial_data(port->serial);
port_priv = devm_kzalloc(>dev, sizeof(*port_priv), GFP_KERNEL);
if (!port_priv)
return -ENOMEM;
@@ -1309,6 +1321,24 @@ static int f81534_port_probe(struct usb_serial_port 
*port)
if (ret)
return ret;
 
+   value = serial_priv->conf_data[port_priv->phy_num];
+   switch (value & F81534_UART_MODE_MASK) {
+   case F81534_PORT_CONF_RS485_INVERT:
+   port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
+   F81534_CLK_RS485_INVERT;
+   dev_dbg(>dev, "RS485 invert mode.\n");
+   break;
+   case F81534_PORT_CONF_RS485:
+   port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
+   dev_dbg(>dev, "RS485 mode.\n");
+   break;
+
+   default:
+   case F81534_PORT_CONF_RS232:
+   dev_dbg(>dev, "RS232 mode.\n");
+   break;
+   }
+
return 0;
 }
 
-- 
2.7.4

[PATCH V3 2/6] usb: serial: f81534: add auto RTS direction support

[Ji-Ze Hong (Peter Hong)]

The F81532/534 had auto RTS direction support for RS485 mode.
We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports.
There are 4 conditions below:
0: F81534_PORT_CONF_RS232.
1: F81534_PORT_CONF_RS485.
2: value error, default to F81534_PORT_CONF_RS232.
3: F81534_PORT_CONF_RS485_INVERT.

F81532/534 Clock register (offset +08h)

Bit0:   UART Enable (always on)
Bit2-1: Clock source selector
00: 1.846MHz.
01: 18.46MHz.
10: 24MHz.
11: 14.77MHz.
Bit4:   Auto direction(RTS) control (RTS pin Low when TX)
Bit5:   Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)

Signed-off-by: Ji-Ze Hong (Peter Hong) 
---
V3:
1: change some BIT() operation to GENMASK().
2: change some dev_info() to dev_dbg().

V2:
1: Read the configure data from flash and save it to shadow clock
   register.

 drivers/usb/serial/f81534.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
index 1563d3f34381..2201be577dd3 100644
--- a/drivers/usb/serial/f81534.c
+++ b/drivers/usb/serial/f81534.c
@@ -98,11 +98,16 @@
 
 #define F81534_DEFAULT_BAUD_RATE   9600
 
+#define F81534_PORT_CONF_RS232 0
+#define F81534_PORT_CONF_RS485 BIT(0)
+#define F81534_PORT_CONF_RS485_INVERT  GENMASK(1, 0)
 #define F81534_PORT_CONF_DISABLE_PORT  BIT(3)
 #define F81534_PORT_CONF_NOT_EXIST_PORTBIT(7)
 #define F81534_PORT_UNAVAILABLE\
(F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
 
+#define F81534_UART_MODE_MASK  GENMASK(1, 0)
+
 #define F81534_1X_RXTRIGGER0xc3
 #define F81534_8X_RXTRIGGER0xcf
 
@@ -115,6 +120,8 @@
  * 01: 18.46MHz.
  * 10: 24MHz.
  * 11: 14.77MHz.
+ * Bit4:   Auto direction(RTS) control (RTS pin Low when TX)
+ * Bit5:   Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
  */
 
 #define F81534_UART_EN BIT(0)
@@ -123,6 +130,8 @@
 #define F81534_CLK_24_MHZ  BIT(2)
 #define F81534_CLK_14_77_MHZ   GENMASK(2, 1)
 #define F81534_CLK_MASKGENMASK(2, 1)
+#define F81534_CLK_RS485_MODE  BIT(4)
+#define F81534_CLK_RS485_INVERTBIT(5)
 
 static const struct usb_device_id f81534_id_table[] = {
{ USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
@@ -1274,9 +1283,12 @@ static void f81534_lsr_worker(struct work_struct *work)
 
 static int f81534_port_probe(struct usb_serial_port *port)
 {
+   struct f81534_serial_private *serial_priv;
struct f81534_port_private *port_priv;
int ret;
+   u8 value;
 
+   serial_priv = usb_get_serial_data(port->serial);
port_priv = devm_kzalloc(>dev, sizeof(*port_priv), GFP_KERNEL);
if (!port_priv)
return -ENOMEM;
@@ -1309,6 +1321,24 @@ static int f81534_port_probe(struct usb_serial_port 
*port)
if (ret)
return ret;
 
+   value = serial_priv->conf_data[port_priv->phy_num];
+   switch (value & F81534_UART_MODE_MASK) {
+   case F81534_PORT_CONF_RS485_INVERT:
+   port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
+   F81534_CLK_RS485_INVERT;
+   dev_dbg(>dev, "RS485 invert mode.\n");
+   break;
+   case F81534_PORT_CONF_RS485:
+   port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
+   dev_dbg(>dev, "RS485 mode.\n");
+   break;
+
+   default:
+   case F81534_PORT_CONF_RS232:
+   dev_dbg(>dev, "RS232 mode.\n");
+   break;
+   }
+
return 0;
 }
 
-- 
2.7.4