Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Guo Ren
On Thu, Sep 27, 2018 at 11:01:34AM +0200, Peter Zijlstra wrote: > On Thu, Sep 27, 2018 at 04:11:42PM +0800, Guo Ren wrote: > > On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > > > > That's not what I meant; I meant you need something like: > > > > > > #define

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Guo Ren
On Thu, Sep 27, 2018 at 11:01:34AM +0200, Peter Zijlstra wrote: > On Thu, Sep 27, 2018 at 04:11:42PM +0800, Guo Ren wrote: > > On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > > > > That's not what I meant; I meant you need something like: > > > > > > #define

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Peter Zijlstra
On Thu, Sep 27, 2018 at 04:11:42PM +0800, Guo Ren wrote: > On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > > That's not what I meant; I meant you need something like: > > > > #define flush_cache_range(vma, start, end) cache_wbinv_range(start, end) > If you remove the

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Peter Zijlstra
On Thu, Sep 27, 2018 at 04:11:42PM +0800, Guo Ren wrote: > On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > > That's not what I meant; I meant you need something like: > > > > #define flush_cache_range(vma, start, end) cache_wbinv_range(start, end) > If you remove the

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Guo Ren
On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > On Thu, Sep 27, 2018 at 01:27:38PM +0800, Guo Ren wrote: > > On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > > > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > > > diff --git

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Guo Ren
On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > On Thu, Sep 27, 2018 at 01:27:38PM +0800, Guo Ren wrote: > > On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > > > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > > > diff --git

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Peter Zijlstra
On Thu, Sep 27, 2018 at 01:27:38PM +0800, Guo Ren wrote: > On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > > > b/arch/csky/abiv1/inc/abi/cacheflush.h > > > new

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-27 Thread Peter Zijlstra
On Thu, Sep 27, 2018 at 01:27:38PM +0800, Guo Ren wrote: > On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > > > b/arch/csky/abiv1/inc/abi/cacheflush.h > > > new

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-26 Thread Guo Ren
On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > > b/arch/csky/abiv1/inc/abi/cacheflush.h > > new file mode 100644 > > index 000..f0de49c > > --- /dev/null > > +++

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-26 Thread Guo Ren
On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote: > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > > b/arch/csky/abiv1/inc/abi/cacheflush.h > > new file mode 100644 > > index 000..f0de49c > > --- /dev/null > > +++

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-25 Thread Peter Zijlstra
On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > b/arch/csky/abiv1/inc/abi/cacheflush.h > new file mode 100644 > index 000..f0de49c > --- /dev/null > +++ b/arch/csky/abiv1/inc/abi/cacheflush.h > @@ -0,0 +1,43 @@ > +//

Re: [PATCH V5 06/30] csky: Cache and TLB routines

2018-09-25 Thread Peter Zijlstra
On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote: > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h > b/arch/csky/abiv1/inc/abi/cacheflush.h > new file mode 100644 > index 000..f0de49c > --- /dev/null > +++ b/arch/csky/abiv1/inc/abi/cacheflush.h > @@ -0,0 +1,43 @@ > +//

[PATCH V5 06/30] csky: Cache and TLB routines

2018-09-24 Thread Guo Ren
This patch adds cache and tlb sync codes for abiv1 & abiv2. Signed-off-by: Guo Ren --- arch/csky/abiv1/cacheflush.c | 51 arch/csky/abiv1/inc/abi/cacheflush.h | 43 +++ arch/csky/abiv1/inc/abi/tlb.h | 12 ++ arch/csky/abiv2/cacheflush.c | 59

[PATCH V5 06/30] csky: Cache and TLB routines

2018-09-24 Thread Guo Ren
This patch adds cache and tlb sync codes for abiv1 & abiv2. Signed-off-by: Guo Ren --- arch/csky/abiv1/cacheflush.c | 51 arch/csky/abiv1/inc/abi/cacheflush.h | 43 +++ arch/csky/abiv1/inc/abi/tlb.h | 12 ++ arch/csky/abiv2/cacheflush.c | 59