On 4/26/2019 9:15 PM, Rob Herring wrote:
On Wed, Apr 24, 2019 at 10:49:59AM +0530, Vidya Sagar wrote:
Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
module instantiated one for each PCIe lane between Synopsys Designware core
based PCIe IP and Universal PHY block.
On Fri, Apr 26, 2019 at 06:07:23PM +0200, Thierry Reding wrote:
> On Fri, Apr 26, 2019 at 10:45:19AM -0500, Rob Herring wrote:
> > On Wed, Apr 24, 2019 at 10:49:59AM +0530, Vidya Sagar wrote:
> > > Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
> > > module instantiated
On Fri, Apr 26, 2019 at 10:45:19AM -0500, Rob Herring wrote:
> On Wed, Apr 24, 2019 at 10:49:59AM +0530, Vidya Sagar wrote:
> > Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
> > module instantiated one for each PCIe lane between Synopsys Designware core
> > based PCIe IP
On Wed, Apr 24, 2019 at 10:49:59AM +0530, Vidya Sagar wrote:
> Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
> module instantiated one for each PCIe lane between Synopsys Designware core
> based PCIe IP and Universal PHY block.
Missing Sob.
> ---
> Changes since [v4]:
Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
module instantiated one for each PCIe lane between Synopsys Designware core
based PCIe IP and Universal PHY block.
---
Changes since [v4]:
* None
Changes since [v3]:
* None
Changes since [v2]:
* Changed node label to
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