Set the DesignWare IP version for Tegra194 to 0x490A. This would be used
by the DesigWare sub-system to do any version specific configuration
(Ex:- TD bit programming for ECRC).
Tested-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Vidya Sagar <vid...@nvidia.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
---
V5:
* Added Tested-by and Acked-by from Thierry Reding
V4:
* None
V3:
* None
V2:
* None
drivers/pci/controller/dwc/pcie-tegra194.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c
b/drivers/pci/controller/dwc/pcie-tegra194.c
index 4c966e9adb2b..59163b735c96 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1984,6 +1984,7 @@ static int tegra_pcie_dw_probe(struct platform_device
*pdev)
pci->ops = &tegra_dw_pcie_ops;
pci->n_fts[0] = N_FTS_VAL;
pci->n_fts[1] = FTS_VAL;
+ pci->version = 0x490A;
pp = &pci->pp;
pp->num_vectors = MAX_MSI_IRQS;
--
2.17.1
