Re: [PATCH V6 0/9] clk: add imx7ulp clk support

2018-12-10 Thread Stephen Boyd
Quoting Shawn Guo (2018-12-10 00:14:56) > On Wed, Dec 05, 2018 at 11:41:01AM -0800, Stephen Boyd wrote: > > No worries, I fixed it up and merged to clk-next. > > Hi Stephen, > > In order to send imx7ulp device tree for 4.21, I pulled branch > clk-imx7ulp into IMX tree to resolve the dependency on

Re: [PATCH V6 0/9] clk: add imx7ulp clk support

2018-12-10 Thread Shawn Guo
On Wed, Dec 05, 2018 at 11:41:01AM -0800, Stephen Boyd wrote: > No worries, I fixed it up and merged to clk-next. Hi Stephen, In order to send imx7ulp device tree for 4.21, I pulled branch clk-imx7ulp into IMX tree to resolve the dependency on clock ID definitions. So please keep the branch stab

RE: [PATCH V6 0/9] clk: add imx7ulp clk support

2018-12-05 Thread Stephen Boyd
arm-ker...@lists.infradead.org; > > mturque...@baylibre.com; shawn...@kernel.org; Anson Huang > > ; Jacky Bai ; dl-linux-imx > > ; Aisheng DONG > > Subject: Re: [PATCH V6 0/9] clk: add imx7ulp clk support > > > > Quoting A.s. Dong (2018-11-14 05:01:31) > > >

RE: [PATCH V6 0/9] clk: add imx7ulp clk support

2018-12-03 Thread Aisheng DONG
l.org; Anson Huang > ; Jacky Bai ; dl-linux-imx > ; Aisheng DONG > Subject: Re: [PATCH V6 0/9] clk: add imx7ulp clk support > > Quoting A.s. Dong (2018-11-14 05:01:31) > > This patch series intends to add imx7ulp clk support. > > > > i.MX7ULP Clock fu

Re: [PATCH V6 0/9] clk: add imx7ulp clk support

2018-12-03 Thread Stephen Boyd
Quoting A.s. Dong (2018-11-14 05:01:31) > This patch series intends to add imx7ulp clk support. > > i.MX7ULP Clock functions are under joint control of the System > Clock Generation (SCG) modules, Peripheral Clock Control (PCC) > modules, and Core Mode Controller (CMC)1 blocks > > The clocking sc

[PATCH V6 0/9] clk: add imx7ulp clk support

2018-11-14 Thread A.s. Dong
This patch series intends to add imx7ulp clk support. i.MX7ULP Clock functions are under joint control of the System Clock Generation (SCG) modules, Peripheral Clock Control (PCC) modules, and Core Mode Controller (CMC)1 blocks The clocking scheme provides clear separation between M4 domain and A