Re: [PATCH net-next 9/9] net: ethernet: ti: ale: add support for multi port k3 cpsw versions

[Grygorii Strashko]

Hi Jakub,

On 05/09/2020 03:10, Jakub Kicinski wrote:

On Sat, 5 Sep 2020 02:09:24 +0300 Grygorii Strashko wrote:

The TI J721E (CPSW9g) ALE version is similar, in general, to Sitara AM3/4/5
CPSW ALE, but has more extended functions and different ALE VLAN entry
format.

This patch adds support for for multi port TI J721E (CPSW9g) ALE variant.


and:

drivers/net/ethernet/ti/cpsw_ale.c:195:28: warning: symbol 
'vlan_entry_k3_cpswxg' was not declared. Should it be static?



Thank you for your report, I've posted v2.
I've had to install latest sparse version (0.6.2) manually to make it work 
properly.

--
Best regards,
grygorii

Re: [PATCH net-next 9/9] net: ethernet: ti: ale: add support for multi port k3 cpsw versions

[Jakub Kicinski]

On Sat, 5 Sep 2020 02:09:24 +0300 Grygorii Strashko wrote:
> The TI J721E (CPSW9g) ALE version is similar, in general, to Sitara AM3/4/5
> CPSW ALE, but has more extended functions and different ALE VLAN entry
> format.
> 
> This patch adds support for for multi port TI J721E (CPSW9g) ALE variant.

and:

drivers/net/ethernet/ti/cpsw_ale.c:195:28: warning: symbol 
'vlan_entry_k3_cpswxg' was not declared. Should it be static?

[PATCH net-next 9/9] net: ethernet: ti: ale: add support for multi port k3 cpsw versions

[Grygorii Strashko]

The TI J721E (CPSW9g) ALE version is similar, in general, to Sitara AM3/4/5
CPSW ALE, but has more extended functions and different ALE VLAN entry
format.

This patch adds support for for multi port TI J721E (CPSW9g) ALE variant.

Signed-off-by: Grygorii Strashko 
---
 drivers/net/ethernet/ti/cpsw_ale.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/net/ethernet/ti/cpsw_ale.c 
b/drivers/net/ethernet/ti/cpsw_ale.c
index 7ca46936a36c..40b6f740d62d 100644
--- a/drivers/net/ethernet/ti/cpsw_ale.c
+++ b/drivers/net/ethernet/ti/cpsw_ale.c
@@ -191,6 +191,14 @@ const struct ale_entry_fld vlan_entry_nu[ALE_ENT_VID_LAST] 
= {
ALE_ENTRY_FLD(ALE_ENT_VID_REG_MCAST_IDX, 44, 3),
 };
 
+/* K3 j721e/j7200 cpsw9g/5g, am64x cpsw3g  */
+const struct ale_entry_fld vlan_entry_k3_cpswxg[] = {
+   ALE_ENTRY_FLD_DYN_MSK_SIZE(ALE_ENT_VID_MEMBER_LIST, 0),
+   ALE_ENTRY_FLD_DYN_MSK_SIZE(ALE_ENT_VID_UNREG_MCAST_MSK, 12),
+   ALE_ENTRY_FLD_DYN_MSK_SIZE(ALE_ENT_VID_FORCE_UNTAGGED_MSK, 24),
+   ALE_ENTRY_FLD_DYN_MSK_SIZE(ALE_ENT_VID_REG_MCAST_MSK, 36),
+};
+
 DEFINE_ALE_FIELD(entry_type,   60, 2)
 DEFINE_ALE_FIELD(vlan_id,  48, 12)
 DEFINE_ALE_FIELD(mcast_state,  62, 2)
@@ -1213,6 +1221,12 @@ static const struct cpsw_ale_dev_id cpsw_ale_id_match[] 
= {
.nu_switch_ale = true,
.vlan_entry_tbl = vlan_entry_nu,
},
+   {
+   .dev_id = "j721e-cpswxg",
+   .features = CPSW_ALE_F_STATUS_REG | CPSW_ALE_F_HW_AUTOAGING,
+   .major_ver_mask = 0x7,
+   .vlan_entry_tbl = vlan_entry_k3_cpswxg,
+   },
{ },
 };
 
-- 
2.17.1