Re: [PATCH net-next v2 2/4] net: phy: Add mdio-aspeed

2019-07-31 Thread Andrew Lunn
On Wed, Jul 31, 2019 at 03:09:57PM +0930, Andrew Jeffery wrote:
> The AST2600 design separates the MDIO controllers from the MAC, which is
> where they were placed in the AST2400 and AST2500. Further, the register
> interface is reworked again, so now we have three possible different
> interface implementations, however this driver only supports the
> interface provided by the AST2600. The AST2400 and AST2500 will continue
> to be supported by the MDIO support embedded in the FTGMAC100 driver.
> 
> The hardware supports both C22 and C45 mode, but for the moment only C22
> support is implemented.
> 
> Signed-off-by: Andrew Jeffery 

Reviewed-by: Andrew Lunn 

Andrew


[PATCH net-next v2 2/4] net: phy: Add mdio-aspeed

2019-07-30 Thread Andrew Jeffery
The AST2600 design separates the MDIO controllers from the MAC, which is
where they were placed in the AST2400 and AST2500. Further, the register
interface is reworked again, so now we have three possible different
interface implementations, however this driver only supports the
interface provided by the AST2600. The AST2400 and AST2500 will continue
to be supported by the MDIO support embedded in the FTGMAC100 driver.

The hardware supports both C22 and C45 mode, but for the moment only C22
support is implemented.

Signed-off-by: Andrew Jeffery 

---
v2:
* Use readl_poll_timeout() instead of open-coded loop
* Error on C45 accesses
---
 drivers/net/phy/Kconfig   |  13 +++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/mdio-aspeed.c | 157 ++
 3 files changed, 171 insertions(+)
 create mode 100644 drivers/net/phy/mdio-aspeed.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 20f14c5fbb7e..206d8650ee7f 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -21,6 +21,19 @@ config MDIO_BUS
 
 if MDIO_BUS
 
+config MDIO_ASPEED
+   tristate "ASPEED MDIO bus controller"
+   depends on ARCH_ASPEED || COMPILE_TEST
+   depends on OF_MDIO && HAS_IOMEM
+   help
+ This module provides a driver for the independent MDIO bus
+ controllers found in the ASPEED AST2600 SoC. This is a driver for the
+ third revision of the ASPEED MDIO register interface - the first two
+ revisions are the "old" and "new" interfaces found in the AST2400 and
+ AST2500, embedded in the MAC. For legacy reasons, FTGMAC100 driver
+ continues to drive the embedded MDIO controller for the AST2400 and
+ AST2500 SoCs, so say N if AST2600 support is not required.
+
 config MDIO_BCM_IPROC
tristate "Broadcom iProc MDIO bus controller"
depends on ARCH_BCM_IPROC || COMPILE_TEST
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 839acb292c38..ba07c27e4208 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -22,6 +22,7 @@ libphy-$(CONFIG_LED_TRIGGER_PHY)  += phy_led_triggers.o
 obj-$(CONFIG_PHYLINK)  += phylink.o
 obj-$(CONFIG_PHYLIB)   += libphy.o
 
+obj-$(CONFIG_MDIO_ASPEED)  += mdio-aspeed.o
 obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
diff --git a/drivers/net/phy/mdio-aspeed.c b/drivers/net/phy/mdio-aspeed.c
new file mode 100644
index ..cad820568f75
--- /dev/null
+++ b/drivers/net/phy/mdio-aspeed.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* Copyright (C) 2019 IBM Corp. */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME "mdio-aspeed"
+
+#define ASPEED_MDIO_CTRL   0x0
+#define   ASPEED_MDIO_CTRL_FIREBIT(31)
+#define   ASPEED_MDIO_CTRL_ST  BIT(28)
+#define ASPEED_MDIO_CTRL_ST_C450
+#define ASPEED_MDIO_CTRL_ST_C221
+#define   ASPEED_MDIO_CTRL_OP  GENMASK(27, 26)
+#define MDIO_C22_OP_WRITE  0b01
+#define MDIO_C22_OP_READ   0b10
+#define   ASPEED_MDIO_CTRL_PHYAD   GENMASK(25, 21)
+#define   ASPEED_MDIO_CTRL_REGAD   GENMASK(20, 16)
+#define   ASPEED_MDIO_CTRL_MIIWDATAGENMASK(15, 0)
+
+#define ASPEED_MDIO_DATA   0x4
+#define   ASPEED_MDIO_DATA_MDC_THRES   GENMASK(31, 24)
+#define   ASPEED_MDIO_DATA_MDIO_EDGE   BIT(23)
+#define   ASPEED_MDIO_DATA_MDIO_LATCH  GENMASK(22, 20)
+#define   ASPEED_MDIO_DATA_IDLEBIT(16)
+#define   ASPEED_MDIO_DATA_MIIRDATAGENMASK(15, 0)
+
+#define ASPEED_MDIO_INTERVAL_US100
+#define ASPEED_MDIO_TIMEOUT_US (ASPEED_MDIO_INTERVAL_US * 10)
+
+struct aspeed_mdio {
+   void __iomem *base;
+};
+
+static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
+{
+   struct aspeed_mdio *ctx = bus->priv;
+   u32 ctrl;
+   u32 data;
+   int rc;
+
+   dev_dbg(>dev, "%s: addr: %d, regnum: %d\n", __func__, addr,
+   regnum);
+
+   /* Just clause 22 for the moment */
+   if (regnum & MII_ADDR_C45)
+   return -EOPNOTSUPP;
+
+   ctrl = ASPEED_MDIO_CTRL_FIRE
+   | FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
+   | FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_READ)
+   | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
+   | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum);
+
+   iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
+
+   rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
+   data & ASPEED_MDIO_DATA_IDLE,
+   ASPEED_MDIO_INTERVAL_US,
+   ASPEED_MDIO_TIMEOUT_US);
+   if (rc < 0)
+   return rc;
+
+   return