Add the DRAMC node for the DRAMC kernel driver.
Properties are divided into three categories:
- Platform DTS:
MediaTek DRAMC platform common part.
- Project DTS:
Runtime filled in by bootloader according to the board
hardware configuration.
- Driver level:
Hardware-specific register settings, encapsulated as
compatible data for better DTS compatibility.
Signed-off-by: Po-Kai Chi <pk....@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 9 +++++++++
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
index 164f5cb..9a556ad 100644
--- a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
@@ -29,3 +29,12 @@
&uart0 {
status = "okay";
};
+
+&dramc {
+ dram_type = <0>;
+ channel_cnt = <2>;
+ rank_cnt = <2>;
+ rank_size = <0x0 0x0>;
+ mr_cnt = <1>;
+ mr = <0x5 0xff>;
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 9bdf514..332d48d 100644
--- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
@@ -206,6 +206,24 @@
clock-names = "devapc-infra-clock";
};
+ dramc: dramc@10230000 {
+ compatible = "mediatek,mt6779-dramc";
+ reg = <0 0x10230000 0 0x2000>, /* DRAMC AO CHA */
+ <0 0x10240000 0 0x2000>, /* DRAMC AO CHB */
+ <0 0x10234000 0 0x1000>, /* DRAMC NAO CHA */
+ <0 0x10244000 0 0x1000>, /* DRAMC NAO CHB */
+ <0 0x10238000 0 0x2000>, /* DDRPHY AO CHA */
+ <0 0x10248000 0 0x2000>; /* DDRPHY AO CHB */
+ support_channel_cnt = <2>;
+ freq_cnt = <6>;
+ freq_step = <3718 3733>,
+ <3094 3200>,
+ <2392 2400>,
+ <1534 1600>,
+ <1196 1200>,
+ <754 800>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt6779-uart",
"mediatek,mt6577-uart";
--
1.7.9.5
