Am Fri, 2 Apr 2021 15:09:12 +0200
schrieb "Enrico Weigelt, metux IT consult" :
> On 09.03.21 09:42, Henning Schild wrote:
>
> > The device will respond to MMIO while being hidden. I am afraid
> > nothing stops a collision, except for the assumption that the BIOS
> > is always right and PCI
On 09.03.21 09:42, Henning Schild wrote:
The device will respond to MMIO while being hidden. I am afraid nothing
stops a collision, except for the assumption that the BIOS is always
right and PCI devices never get remapped. But just guessing here.
What could go wrong if it is remapped, except
On Thu, Apr 01, 2021 at 09:23:04PM +0300, Andy Shevchenko wrote:
> On Thu, Apr 01, 2021 at 11:42:56AM -0500, Bjorn Helgaas wrote:
> > On Thu, Apr 01, 2021 at 06:45:02PM +0300, Andy Shevchenko wrote:
> > > On Tue, Mar 09, 2021 at 09:42:52AM +0100, Henning Schild wrote:
> > > > Am Mon, 8 Mar 2021
On Sat, Mar 13, 2021 at 10:45:57AM +0100, Henning Schild wrote:
> Am Mon, 8 Mar 2021 14:20:16 +0200
> schrieb Andy Shevchenko :
...
> > + * pci_p2sb_bar - Get Primary to Sideband bridge (P2SB) device BAR
> > + * @pdev: PCI device to get a PCI bus to communicate with
> > + * @devfn: PCI slot and
On Tue, Mar 09, 2021 at 09:42:52AM +0100, Henning Schild wrote:
> Am Mon, 8 Mar 2021 19:42:21 -0600
> schrieb Bjorn Helgaas :
> > On Mon, Mar 08, 2021 at 09:16:50PM +0200, Andy Shevchenko wrote:
> > > On Mon, Mar 08, 2021 at 12:52:12PM -0600, Bjorn Helgaas wrote:
> > > > On Mon, Mar 08, 2021 at
On Thu, Apr 01, 2021 at 09:22:02PM +0300, Andy Shevchenko wrote:
> On Thu, Apr 01, 2021 at 09:06:17PM +0300, Mika Westerberg wrote:
> > On Thu, Apr 01, 2021 at 06:43:11PM +0300, Andy Shevchenko wrote:
> > > On Sat, Mar 13, 2021 at 10:45:57AM +0100, Henning Schild wrote:
> > > > Am Mon, 8 Mar 2021
On Thu, Apr 01, 2021 at 11:42:56AM -0500, Bjorn Helgaas wrote:
> On Thu, Apr 01, 2021 at 06:45:02PM +0300, Andy Shevchenko wrote:
> > On Tue, Mar 09, 2021 at 09:42:52AM +0100, Henning Schild wrote:
> > > Am Mon, 8 Mar 2021 19:42:21 -0600
> > > schrieb Bjorn Helgaas :
> > > > On Mon, Mar 08, 2021
On Thu, Apr 01, 2021 at 09:06:17PM +0300, Mika Westerberg wrote:
> On Thu, Apr 01, 2021 at 06:43:11PM +0300, Andy Shevchenko wrote:
> > On Sat, Mar 13, 2021 at 10:45:57AM +0100, Henning Schild wrote:
> > > Am Mon, 8 Mar 2021 14:20:16 +0200
> > > schrieb Andy Shevchenko :
> >
> > ...
> >
> > > >
On Thu, Apr 01, 2021 at 06:43:11PM +0300, Andy Shevchenko wrote:
> On Sat, Mar 13, 2021 at 10:45:57AM +0100, Henning Schild wrote:
> > Am Mon, 8 Mar 2021 14:20:16 +0200
> > schrieb Andy Shevchenko :
>
> ...
>
> > > + * pci_p2sb_bar - Get Primary to Sideband bridge (P2SB) device BAR
> > > + *
On Thu, Apr 01, 2021 at 06:45:02PM +0300, Andy Shevchenko wrote:
> On Tue, Mar 09, 2021 at 09:42:52AM +0100, Henning Schild wrote:
> > Am Mon, 8 Mar 2021 19:42:21 -0600
> > schrieb Bjorn Helgaas :
> > > On Mon, Mar 08, 2021 at 09:16:50PM +0200, Andy Shevchenko wrote:
> > > > On Mon, Mar 08, 2021
Am Mon, 8 Mar 2021 14:20:16 +0200
schrieb Andy Shevchenko :
> From: Jonathan Yong
>
> There is already one and at least one more user is coming which
> requires an access to Primary to Sideband bridge (P2SB) in order to
> get IO or MMIO bar hidden by BIOS. Create a library to access P2SB
> for
Am Mon, 8 Mar 2021 19:42:21 -0600
schrieb Bjorn Helgaas :
> On Mon, Mar 08, 2021 at 09:16:50PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 08, 2021 at 12:52:12PM -0600, Bjorn Helgaas wrote:
> > > On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> > > > From: Jonathan Yong
>
On Mon, Mar 08, 2021 at 09:16:50PM +0200, Andy Shevchenko wrote:
> On Mon, Mar 08, 2021 at 12:52:12PM -0600, Bjorn Helgaas wrote:
> > On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> > > From: Jonathan Yong
> > >
> > > There is already one and at least one more user is coming
On Mon, Mar 08, 2021 at 12:52:12PM -0600, Bjorn Helgaas wrote:
> On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> > From: Jonathan Yong
> >
> > There is already one and at least one more user is coming which
> > requires an access to Primary to Sideband bridge (P2SB) in order
On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> From: Jonathan Yong
>
> There is already one and at least one more user is coming which
> requires an access to Primary to Sideband bridge (P2SB) in order to
> get IO or MMIO bar hidden by BIOS. Create a library to access P2SB
>
From: Jonathan Yong
There is already one and at least one more user is coming which
requires an access to Primary to Sideband bridge (P2SB) in order to
get IO or MMIO bar hidden by BIOS. Create a library to access P2SB
for x86 devices.
Signed-off-by: Jonathan Yong
Co-developed-by: Andy
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