On 06/25/2018 09:39 PM, Wolfram Sang wrote:
On Wed, Jun 13, 2018 at 02:36:12PM -0500, Eddie James wrote:
This series adds an algorithm for an I2C master physically located on an FSI
slave device. The I2C master has multiple ports, each of which may be connected
to an I2C slave. Access to the
On Wed, Jun 13, 2018 at 02:36:12PM -0500, Eddie James wrote:
> This series adds an algorithm for an I2C master physically located on an FSI
> slave device. The I2C master has multiple ports, each of which may be
> connected
> to an I2C slave. Access to the I2C master registers is achieved over FSI
On 14 June 2018 at 05:06, Eddie James wrote:
> This series adds an algorithm for an I2C master physically located on an FSI
> slave device. The I2C master has multiple ports, each of which may be
> connected
> to an I2C slave. Access to the I2C master registers is achieved over FSI bus.
>
> Due t
On Wed, Jun 13, 2018 at 10:36 PM, Eddie James
wrote:
> This series adds an algorithm for an I2C master physically located on an FSI
> slave device. The I2C master has multiple ports, each of which may be
> connected
> to an I2C slave. Access to the I2C master registers is achieved over FSI bus.
>
This series adds an algorithm for an I2C master physically located on an FSI
slave device. The I2C master has multiple ports, each of which may be connected
to an I2C slave. Access to the I2C master registers is achieved over FSI bus.
Due to the multi-port nature of the I2C master, the driver inst
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