[PATCH v11 1/2] dt: qcom: Add opp and thermal to the msm8996

2018-05-23 Thread Ilia Lin 
Signed-off-by: Ilia Lin 
Acked-by: Viresh Kumar 
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
 1 file changed, 260 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c..e6cf290 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 / {
model = "Qualcomm Technologies, Inc. MSM8996";
@@ -97,6 +98,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
+   clocks = < 0>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_0>;
L2_0: l2-cache {
  compatible = "cache";
@@ -109,6 +113,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x1>;
enable-method = "psci";
+   clocks = < 0>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_0>;
};
 
@@ -117,6 +124,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
+   clocks = < 1>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_1>;
L2_1: l2-cache {
  compatible = "cache";
@@ -129,6 +139,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x101>;
enable-method = "psci";
+   clocks = < 1>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_1>;
};
 
@@ -155,6 +168,182 @@
};
};
 
+   cluster0_opp: opp_table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-30720 {
+   opp-hz = /bits/ 64 <30720>;
+   clock-latency-ns = <20>;
+   };
+   opp-42240 {
+   opp-hz = /bits/ 64 <42240>;
+   clock-latency-ns = <20>;
+   };
+   opp-48000 {
+   opp-hz = /bits/ 64 <48000>;
+   clock-latency-ns = <20>;
+   };
+   opp-55680 {
+   opp-hz = /bits/ 64 <55680>;
+   clock-latency-ns = <20>;
+   };
+   opp-65280 {
+   opp-hz = /bits/ 64 <65280>;
+   clock-latency-ns = <20>;
+   };
+   opp-72960 {
+   opp-hz = /bits/ 64 <72960>;
+   clock-latency-ns = <20>;
+   };
+   opp-84480 {
+   opp-hz = /bits/ 64 <84480>;
+   clock-latency-ns = <20>;
+   };
+   opp-96000 {
+   opp-hz = /bits/ 64 <96000>;
+   clock-latency-ns = <20>;
+   };
+   opp-103680 {
+   opp-hz = /bits/ 64 <103680>;
+   clock-latency-ns = <20>;
+   };
+   opp-111360 {
+   opp-hz = /bits/ 64 <111360>;
+   clock-latency-ns = <20>;
+   };
+   opp-119040 {
+   opp-hz = /bits/ 64 <119040>;
+   clock-latency-ns = <20>;
+   };
+   opp-122880 {
+   opp-hz = /bits/ 64 <122880>;
+   clock-latency-ns = <20>;
+   };
+   opp-132480 {
+   opp-hz = /bits/ 64 <132480>;
+   clock-latency-ns = <20>;
+   };
+   opp-140160 {
+   opp-hz = /bits/ 64 <140160>;
+   clock-latency-ns = <20>;
+   };
+   opp-147840 {
+   opp-hz = /bits/ 64 <147840>;
+   clock-latency-ns = <20>;
+   };
+   opp-159360 {
+   opp-hz = /bits/ 64 <159360>;
+   clock-latency-ns = <20>;
+   };
+   };
+
+   cluster1_opp: opp_table1 {
+

[PATCH v11 1/2] dt: qcom: Add opp and thermal to the msm8996

2018-05-23 Thread Ilia Lin 
Signed-off-by: Ilia Lin 
Acked-by: Viresh Kumar 
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
 1 file changed, 260 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c..e6cf290 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 / {
model = "Qualcomm Technologies, Inc. MSM8996";
@@ -97,6 +98,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
+   clocks = < 0>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_0>;
L2_0: l2-cache {
  compatible = "cache";
@@ -109,6 +113,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x1>;
enable-method = "psci";
+   clocks = < 0>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_0>;
};
 
@@ -117,6 +124,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
+   clocks = < 1>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_1>;
L2_1: l2-cache {
  compatible = "cache";
@@ -129,6 +139,9 @@
compatible = "qcom,kryo";
reg = <0x0 0x101>;
enable-method = "psci";
+   clocks = < 1>;
+   operating-points-v2 = <_opp>;
+   #cooling-cells = <2>;
next-level-cache = <_1>;
};
 
@@ -155,6 +168,182 @@
};
};
 
+   cluster0_opp: opp_table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-30720 {
+   opp-hz = /bits/ 64 <30720>;
+   clock-latency-ns = <20>;
+   };
+   opp-42240 {
+   opp-hz = /bits/ 64 <42240>;
+   clock-latency-ns = <20>;
+   };
+   opp-48000 {
+   opp-hz = /bits/ 64 <48000>;
+   clock-latency-ns = <20>;
+   };
+   opp-55680 {
+   opp-hz = /bits/ 64 <55680>;
+   clock-latency-ns = <20>;
+   };
+   opp-65280 {
+   opp-hz = /bits/ 64 <65280>;
+   clock-latency-ns = <20>;
+   };
+   opp-72960 {
+   opp-hz = /bits/ 64 <72960>;
+   clock-latency-ns = <20>;
+   };
+   opp-84480 {
+   opp-hz = /bits/ 64 <84480>;
+   clock-latency-ns = <20>;
+   };
+   opp-96000 {
+   opp-hz = /bits/ 64 <96000>;
+   clock-latency-ns = <20>;
+   };
+   opp-103680 {
+   opp-hz = /bits/ 64 <103680>;
+   clock-latency-ns = <20>;
+   };
+   opp-111360 {
+   opp-hz = /bits/ 64 <111360>;
+   clock-latency-ns = <20>;
+   };
+   opp-119040 {
+   opp-hz = /bits/ 64 <119040>;
+   clock-latency-ns = <20>;
+   };
+   opp-122880 {
+   opp-hz = /bits/ 64 <122880>;
+   clock-latency-ns = <20>;
+   };
+   opp-132480 {
+   opp-hz = /bits/ 64 <132480>;
+   clock-latency-ns = <20>;
+   };
+   opp-140160 {
+   opp-hz = /bits/ 64 <140160>;
+   clock-latency-ns = <20>;
+   };
+   opp-147840 {
+   opp-hz = /bits/ 64 <147840>;
+   clock-latency-ns = <20>;
+   };
+   opp-159360 {
+   opp-hz = /bits/ 64 <159360>;
+   clock-latency-ns = <20>;
+   };
+   };
+
+   cluster1_opp: opp_table1 {
+   compatible = "operating-points-v2";
+