Re: [PATCH v12 4/7] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-08-22 Thread Maarten Lankhorst
Op 17-08-16 om 21:55 schreef Lyude: > Thanks to Ville for suggesting this as a potential solution to pipe > underruns on Skylake. > > On Skylake all of the registers for configuring planes, including the > registers for configuring their watermarks, are double buffered. New > values written to

Re: [PATCH v12 4/7] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-08-22 Thread Maarten Lankhorst
Op 17-08-16 om 21:55 schreef Lyude: > Thanks to Ville for suggesting this as a potential solution to pipe > underruns on Skylake. > > On Skylake all of the registers for configuring planes, including the > registers for configuring their watermarks, are double buffered. New > values written to

[PATCH v12 4/7] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-08-17 Thread Lyude
Thanks to Ville for suggesting this as a potential solution to pipe underruns on Skylake. On Skylake all of the registers for configuring planes, including the registers for configuring their watermarks, are double buffered. New values written to them won't take effect until said registers are

[PATCH v12 4/7] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-08-17 Thread Lyude
Thanks to Ville for suggesting this as a potential solution to pipe underruns on Skylake. On Skylake all of the registers for configuring planes, including the registers for configuring their watermarks, are double buffered. New values written to them won't take effect until said registers are