On Fri, 31 Aug 2018 at 08:43, Kim Phillips wrote:
>
> On Fri, 31 Aug 2018 14:42:00 +0100
> Robert Walker wrote:
>
> > Generally, I agree with you about breaking backward compatibility, but
> > in this case I don't think there is an actual problem. As I understand
>
> I consider it a serious
On Fri, 31 Aug 2018 at 08:43, Kim Phillips wrote:
>
> On Fri, 31 Aug 2018 14:42:00 +0100
> Robert Walker wrote:
>
> > Generally, I agree with you about breaking backward compatibility, but
> > in this case I don't think there is an actual problem. As I understand
>
> I consider it a serious
On Fri, 31 Aug 2018 14:42:00 +0100
Robert Walker wrote:
> Generally, I agree with you about breaking backward compatibility, but
> in this case I don't think there is an actual problem. As I understand
I consider it a serious problem.
> it, you're worried that perf will break for people who
On Fri, 31 Aug 2018 14:42:00 +0100
Robert Walker wrote:
> Generally, I agree with you about breaking backward compatibility, but
> in this case I don't think there is an actual problem. As I understand
I consider it a serious problem.
> it, you're worried that perf will break for people who
Hi Kim,
Generally, I agree with you about breaking backward compatibility, but
in this case I don't think there is an actual problem. As I understand
it, you're worried that perf will break for people who are using an
older version (0.8.x) of the OpenCSD library for CoreSight trace decode
Hi Kim,
Generally, I agree with you about breaking backward compatibility, but
in this case I don't think there is an actual problem. As I understand
it, you're worried that perf will break for people who are using an
older version (0.8.x) of the OpenCSD library for CoreSight trace decode
On Wed, 29 Aug 2018 15:34:16 +0100
Robert Walker wrote:
> Hi Kim,
Hi Robert,
> On 29/08/18 14:49, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 10:44:23 +0100
> > Robert Walker wrote:
> >
> >> This patch adds support for generating instruction samples from trace of
> >> AArch32 programs using
On Wed, 29 Aug 2018 15:34:16 +0100
Robert Walker wrote:
> Hi Kim,
Hi Robert,
> On 29/08/18 14:49, Kim Phillips wrote:
> > On Wed, 29 Aug 2018 10:44:23 +0100
> > Robert Walker wrote:
> >
> >> This patch adds support for generating instruction samples from trace of
> >> AArch32 programs using
Hi Kim,
On 29/08/18 14:49, Kim Phillips wrote:
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
This patch adds support for generating instruction samples from trace of
AArch32 programs using the A32 and T32 instruction sets.
T32 has variable 2 or 4 byte instruction size, so the
Hi Kim,
On 29/08/18 14:49, Kim Phillips wrote:
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
This patch adds support for generating instruction samples from trace of
AArch32 programs using the A32 and T32 instruction sets.
T32 has variable 2 or 4 byte instruction size, so the
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
> This patch adds support for generating instruction samples from trace of
> AArch32 programs using the A32 and T32 instruction sets.
>
> T32 has variable 2 or 4 byte instruction size, so the conversion between
> addresses and instruction
On Wed, 29 Aug 2018 10:44:23 +0100
Robert Walker wrote:
> This patch adds support for generating instruction samples from trace of
> AArch32 programs using the A32 and T32 instruction sets.
>
> T32 has variable 2 or 4 byte instruction size, so the conversion between
> addresses and instruction
This patch adds support for generating instruction samples from trace of
AArch32 programs using the A32 and T32 instruction sets.
T32 has variable 2 or 4 byte instruction size, so the conversion between
addresses and instruction counts requires extra information from the trace
decoder, requiring
This patch adds support for generating instruction samples from trace of
AArch32 programs using the A32 and T32 instruction sets.
T32 has variable 2 or 4 byte instruction size, so the conversion between
addresses and instruction counts requires extra information from the trace
decoder, requiring
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