在 2018/1/17 上午5:51, Borislav Petkov 写道:
> On Tue, Jan 16, 2018 at 01:30:19PM -0800, Luck, Tony wrote:
>> I could get you a list of model numbers that you can check against
>> model_name.
>
> Yeah, we're not doing that again. :)
>
>> But that seems way worse. Especially as the 2.5MB thing is
在 2018/1/17 上午5:51, Borislav Petkov 写道:
> On Tue, Jan 16, 2018 at 01:30:19PM -0800, Luck, Tony wrote:
>> I could get you a list of model numbers that you can check against
>> model_name.
>
> Yeah, we're not doing that again. :)
>
>> But that seems way worse. Especially as the 2.5MB thing is
On Tue, Jan 16, 2018 at 01:30:19PM -0800, Luck, Tony wrote:
> I could get you a list of model numbers that you can check against
> model_name.
Yeah, we're not doing that again. :)
> But that seems way worse. Especially as the 2.5MB thing is what is
> called out in the erratum.
Oh well.
Thx.
On Tue, Jan 16, 2018 at 01:30:19PM -0800, Luck, Tony wrote:
> I could get you a list of model numbers that you can check against
> model_name.
Yeah, we're not doing that again. :)
> But that seems way worse. Especially as the 2.5MB thing is what is
> called out in the erratum.
Oh well.
Thx.
On Tue, Jan 16, 2018 at 09:50:37PM +0100, Borislav Petkov wrote:
> ... and there's not a more reliable way to detect those like platform ID
> or so? Because if for anywhere, this is where one *should* use platform
> ID.
>
> Or perhaps some other bit somewhere instead of this cache size thing?
I
On Tue, Jan 16, 2018 at 09:50:37PM +0100, Borislav Petkov wrote:
> ... and there's not a more reliable way to detect those like platform ID
> or so? Because if for anywhere, this is where one *should* use platform
> ID.
>
> Or perhaps some other bit somewhere instead of this cache size thing?
I
On Tue, Jan 16, 2018 at 12:11:58PM -0800, Luck, Tony wrote:
> I think so. The erratum (see below) says the problem only occurs
> on the large-cache SKUs. So we only need to avoid the update if
> we are on a big cache SKU that is also running old microcode.
... and there's not a more reliable way
On Tue, Jan 16, 2018 at 12:11:58PM -0800, Luck, Tony wrote:
> I think so. The erratum (see below) says the problem only occurs
> on the large-cache SKUs. So we only need to avoid the update if
> we are on a big cache SKU that is also running old microcode.
... and there's not a more reliable way
On Tue, Jan 16, 2018 at 09:01:49PM +0100, Borislav Petkov wrote:
> On Tue, Jan 16, 2018 at 05:24:27PM +, Luck, Tony wrote:
> > > I'll look for someone who can confirm the 2.5MB/core detail.
> >
> > Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
> >
> > No mention
On Tue, Jan 16, 2018 at 09:01:49PM +0100, Borislav Petkov wrote:
> On Tue, Jan 16, 2018 at 05:24:27PM +, Luck, Tony wrote:
> > > I'll look for someone who can confirm the 2.5MB/core detail.
> >
> > Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
> >
> > No mention
On Tue, Jan 16, 2018 at 05:24:27PM +, Luck, Tony wrote:
> > I'll look for someone who can confirm the 2.5MB/core detail.
>
> Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
>
> No mention of the platform ID, but Jia is dropping that part.
>
> Boris ... what
On Tue, Jan 16, 2018 at 05:24:27PM +, Luck, Tony wrote:
> > I'll look for someone who can confirm the 2.5MB/core detail.
>
> Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
>
> No mention of the platform ID, but Jia is dropping that part.
>
> Boris ... what
> I'll look for someone who can confirm the 2.5MB/core detail.
Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
No mention of the platform ID, but Jia is dropping that part.
Boris ... what specific questions remain?
-Tony
> I'll look for someone who can confirm the 2.5MB/core detail.
Ok ... re-read the erratum. The 2.5MB/core is clear. The E5+E7 is clear.
No mention of the platform ID, but Jia is dropping that part.
Boris ... what specific questions remain?
-Tony
>> I'm not taking this: this looks like a bunch of voodoo magic numbers.
>> Please get someone from Intel to explain first.
>
> Tony, could you clarify this?
Jia,
I'll look for someone who can confirm the 2.5MB/core detail.
-Tony
>> I'm not taking this: this looks like a bunch of voodoo magic numbers.
>> Please get someone from Intel to explain first.
>
> Tony, could you clarify this?
Jia,
I'll look for someone who can confirm the 2.5MB/core detail.
-Tony
On Tue, Jan 16, 2018 at 09:14:44AM +0800, Jia Zhang wrote:
> or driver init style?
>
> @@ -996,5 +999,7 @@ struct microcode_ops * __init init_intel_microcode(void)
> return NULL;
> }
>
> + llc_size_per_core = calc_llc_size_per_core(c);
> +
> return
On Tue, Jan 16, 2018 at 09:14:44AM +0800, Jia Zhang wrote:
> or driver init style?
>
> @@ -996,5 +999,7 @@ struct microcode_ops * __init init_intel_microcode(void)
> return NULL;
> }
>
> + llc_size_per_core = calc_llc_size_per_core(c);
> +
> return
在 2018/1/16 上午2:46, Borislav Petkov 写道:
> On Mon, Jan 15, 2018 at 09:11:57PM +0800, Jia Zhang wrote:
>> The commit b94b73733171
>> ("x86/microcode/intel: Extend BDW late-loading with a revision check")
>> reduces the impact of erratum BDF90 for Broadwell process model.
>> Actually, the impact
在 2018/1/16 上午2:46, Borislav Petkov 写道:
> On Mon, Jan 15, 2018 at 09:11:57PM +0800, Jia Zhang wrote:
>> The commit b94b73733171
>> ("x86/microcode/intel: Extend BDW late-loading with a revision check")
>> reduces the impact of erratum BDF90 for Broadwell process model.
>> Actually, the impact
On Mon, Jan 15, 2018 at 09:11:57PM +0800, Jia Zhang wrote:
> The commit b94b73733171
> ("x86/microcode/intel: Extend BDW late-loading with a revision check")
> reduces the impact of erratum BDF90 for Broadwell process model.
> Actually, the impact can be reduced further through adding the checks
>
On Mon, Jan 15, 2018 at 09:11:57PM +0800, Jia Zhang wrote:
> The commit b94b73733171
> ("x86/microcode/intel: Extend BDW late-loading with a revision check")
> reduces the impact of erratum BDF90 for Broadwell process model.
> Actually, the impact can be reduced further through adding the checks
>
The commit b94b73733171
("x86/microcode/intel: Extend BDW late-loading with a revision check")
reduces the impact of erratum BDF90 for Broadwell process model.
Actually, the impact can be reduced further through adding the checks
for the size of LLC per core.
For more details, see erratum BDF90
The commit b94b73733171
("x86/microcode/intel: Extend BDW late-loading with a revision check")
reduces the impact of erratum BDF90 for Broadwell process model.
Actually, the impact can be reduced further through adding the checks
for the size of LLC per core.
For more details, see erratum BDF90
24 matches
Mail list logo
