Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
Thanks Bjorn, On 24/05/14 00:26, Bjorn Andersson wrote: On Fri, May 23, 2014 at 9:50 AM, Srinivas Kandagatla wrote: Hi Bjorn, Thanks for the update. Hi Srini, After pulling in Ulfs next branch again and reapplying v3 my issues are now gone. Not sure what I screwed up when I merged v2, this seems to work just fine now. Sorry for the fuzz. That's fantastic news and just in time. Hopefully we could make these patches for 3.16? thanks, srini I haven't done any extensive testing, but my CRC issues are definitely sorted out. I will go ahead and see if I can get external mmc working now as well. Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
On Fri, May 23, 2014 at 9:50 AM, Srinivas Kandagatla wrote: > Hi Bjorn, > > Thanks for the update. Hi Srini, After pulling in Ulfs next branch again and reapplying v3 my issues are now gone. Not sure what I screwed up when I merged v2, this seems to work just fine now. Sorry for the fuzz. I haven't done any extensive testing, but my CRC issues are definitely sorted out. I will go ahead and see if I can get external mmc working now as well. Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
Hi Bjorn, Thanks for the update. On 23/05/14 16:20, Bjorn Andersson wrote: On Fri, May 23, 2014 at 1:11 AM, Srinivas Kandagatla wrote: On 23/05/14 08:50, Ulf Hansson wrote: [...] It seems like you had some CRC issues during read/write? Did you manage to resolve that issue? Bjorn is using different SOC and board than the IFC6410 Am testing on, so its completely different setup. on IFC6410 we did lot of stress testing and no issues seen. so suspecting the issues are very specific to that board or the eMMC Bjorn is using. We are suspecting that the CRC issues are due to the fact that there is no code to manage regulators. My test setup uses dummy regulator, and the eMMC and external SD cards seems to be Ok with default voltages. Am not sure if thats the same with Bjorn's board. I started off by using the same setup as you; relying on the boot leaving everything in a working condition and using fixed-regulator; with that setup I saw the CRC issues. I then introduced my rpm and regulator driver and it didn't change anything related to the CRC error behaviour. I have verified that I have the right pinconf and the clocks seems to match what we have with working codeaurora based SW. One thing that I did notice is that we run our devices with MMC_CAP_UHS_DDR50, while Qualcomm doesn't, but I have not been able to introduce a change in behaviour by modifying the caps. I think the driver needs some more additional configs in clkreg to support UHS_DDR50 mode.. I will try to create a patch for that. Did you get a chance to test external SD/MMC card? I do see the same problem both on 8960 and on 8064; although on 8064 it's much worse. I will do some more debugging to see if I can find any further differences in the two setups. Yes, Please let me know if you need any kind of support in debugging. We can sync up on IRC on this. Its important that we solve this issue. Thanks, srini Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
On Fri, May 23, 2014 at 1:11 AM, Srinivas Kandagatla wrote: > On 23/05/14 08:50, Ulf Hansson wrote: [...] >> It seems like you had some CRC issues during read/write? Did you >> manage to resolve that issue? > > > Bjorn is using different SOC and board than the IFC6410 Am testing on, so > its completely different setup. > on IFC6410 we did lot of stress testing and no issues seen. so suspecting > the issues are very specific to that board or the eMMC Bjorn is using. > > We are suspecting that the CRC issues are due to the fact that there is no > code to manage regulators. My test setup uses dummy regulator, and the eMMC > and external SD cards seems to be Ok with default voltages. > > Am not sure if thats the same with Bjorn's board. I started off by using the same setup as you; relying on the boot leaving everything in a working condition and using fixed-regulator; with that setup I saw the CRC issues. I then introduced my rpm and regulator driver and it didn't change anything related to the CRC error behaviour. I have verified that I have the right pinconf and the clocks seems to match what we have with working codeaurora based SW. One thing that I did notice is that we run our devices with MMC_CAP_UHS_DDR50, while Qualcomm doesn't, but I have not been able to introduce a change in behaviour by modifying the caps. I do see the same problem both on 8960 and on 8064; although on 8064 it's much worse. I will do some more debugging to see if I can find any further differences in the two setups. Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
On 23/05/14 08:50, Ulf Hansson wrote: On 23 May 2014 09:13, Srinivas Kandagatla wrote: Hi Ulf, I like to get this patches for v3.16, any chance of considering these patches to v3.16 ? I promise to have them properly reviewed early next week, sorry for taking so long. Let's see where this leads us. Thankyou. It seems like you had some CRC issues during read/write? Did you manage to resolve that issue? Bjorn is using different SOC and board than the IFC6410 Am testing on, so its completely different setup. on IFC6410 we did lot of stress testing and no issues seen. so suspecting the issues are very specific to that board or the eMMC Bjorn is using. We are suspecting that the CRC issues are due to the fact that there is no code to manage regulators. My test setup uses dummy regulator, and the eMMC and external SD cards seems to be Ok with default voltages. Am not sure if thats the same with Bjorn's board. Thanks, srini Kind regards Ulf Hansson -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
On 23 May 2014 09:13, Srinivas Kandagatla wrote: > Hi Ulf, > I like to get this patches for v3.16, any chance of considering these > patches to v3.16 ? I promise to have them properly reviewed early next week, sorry for taking so long. Let's see where this leads us. It seems like you had some CRC issues during read/write? Did you manage to resolve that issue? Kind regards Ulf Hansson -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 00/14] Add Qualcomm SD Card Controller support
Hi Ulf, I like to get this patches for v3.16, any chance of considering these patches to v3.16 ? --srini On 15/05/14 10:34, srinivas.kandaga...@linaro.org wrote: From: Srinivas Kandagatla Thankyou everyone for reviewing both RFC and v1 patches. This patch series adds Qualcomm SD Card Controller support in pl180 mmci driver. QCom SDCC is basically a pl180, but bit more customized, some of the register layouts and offsets are different to the ones mentioned in pl180 datasheet. The plan is to totally remove the standalone SDCC driver drivers/mmc/host/msm_sdcc.* and start using generic mmci driver for all Qualcomm parts, as we get chance to test on other Qcom boards. To start using the existing mmci driver, a fake amba id for Qualcomm is added in patches: mmc: mmci: Add Qualcomm Id to amba id table. Second change is, adding a 3 clock cycle delay for register writes on QCOM SDCC registers, which is done in patches: mmc: mmci: Add register read/write wrappers. mmc: mmci: Qcomm: Add 3 clock cycle delay after register write Third change is to accommodate CLK, DATCTRL and MMCICLK register layout changes in Qcom SDCC and provide more flexibity in driver to specify these changes via variant datastructure. Which are done in patches: mmc: mmci: Add Qcom datactrl register variant mmc: mmci: add ddrmode mask to variant data mmc: mmci: add 8bit bus support in variant data mmc: mmci: add edge support to data and command out in variant data. mmc: mmci: add Qcom specifics of clk and datactrl registers. mmc: mmci: Add support to data commands via variant structure. mmc: mmci: add support for fbclk to latch data and cmd. mmc: mmci: add qcom specific clk control Fourth major change was to add qcom specfic pio read function, the need for this is because the way MCIFIFOCNT register behaved in QCOM SDCC is very different to the one in pl180. This change is done in patch: mmc: mmci: Add Qcom specific pio_read function. Last some Qcom unrelated changes/cleanup to driver are done in patches: mmc: mmci: use NSEC_PER_SEC macro mmc: mmci: convert register bits to use BIT() macro. This patches are tested in PIO mode on IFC8064 board with both eMMC and external SD card. I would like to get this support in v3.16. Changes from v1: - moved most of the SOC specifics to variant parameters as suggested by Linus W. - renamed registers as suggested by Linus W. - Added comments in the code as suggested by Linus W. - moved out AMBA ID addition patch from this series. - rebased the patches to git://git.linaro.org/people/ulf.hansson/mmc.git next as suggested by Ulf H. Changes from RFC: - moved out clk setup out of spinlock as pointed by Stephen B. Thanks, srini Srinivas Kandagatla (14): mmc: mmci: use NSEC_PER_SEC macro mmc: mmci: convert register bits to use BIT() macro. mmc: mmci: Add Qualcomm Id to amba id table mmc: mmci: Add Qcom datactrl register variant mmc: mmci: Add register read/write wrappers. mmc: mmci: Qcomm: Add 3 clock cycle delay after register write mmc: mmci: add ddrmode mask to variant data mmc: mmci: add 8bit bus support in variant data mmc: mmci: add edge support to data and command out in variant data. mmc: mmci: add Qcom specifics of clk and datactrl registers. mmc: mmci: Add support to data commands via variant structure. mmc: mmci: add support for fbclk to latch data and cmd. mmc: mmci: add qcom specific clk control mmc: mmci: Add Qcom specific pio_read function. drivers/mmc/host/mmci.c | 245 drivers/mmc/host/mmci.h | 232 + 2 files changed, 311 insertions(+), 166 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 00/14] Add Qualcomm SD Card Controller support
From: Srinivas Kandagatla Thankyou everyone for reviewing both RFC and v1 patches. This patch series adds Qualcomm SD Card Controller support in pl180 mmci driver. QCom SDCC is basically a pl180, but bit more customized, some of the register layouts and offsets are different to the ones mentioned in pl180 datasheet. The plan is to totally remove the standalone SDCC driver drivers/mmc/host/msm_sdcc.* and start using generic mmci driver for all Qualcomm parts, as we get chance to test on other Qcom boards. To start using the existing mmci driver, a fake amba id for Qualcomm is added in patches: mmc: mmci: Add Qualcomm Id to amba id table. Second change is, adding a 3 clock cycle delay for register writes on QCOM SDCC registers, which is done in patches: mmc: mmci: Add register read/write wrappers. mmc: mmci: Qcomm: Add 3 clock cycle delay after register write Third change is to accommodate CLK, DATCTRL and MMCICLK register layout changes in Qcom SDCC and provide more flexibity in driver to specify these changes via variant datastructure. Which are done in patches: mmc: mmci: Add Qcom datactrl register variant mmc: mmci: add ddrmode mask to variant data mmc: mmci: add 8bit bus support in variant data mmc: mmci: add edge support to data and command out in variant data. mmc: mmci: add Qcom specifics of clk and datactrl registers. mmc: mmci: Add support to data commands via variant structure. mmc: mmci: add support for fbclk to latch data and cmd. mmc: mmci: add qcom specific clk control Fourth major change was to add qcom specfic pio read function, the need for this is because the way MCIFIFOCNT register behaved in QCOM SDCC is very different to the one in pl180. This change is done in patch: mmc: mmci: Add Qcom specific pio_read function. Last some Qcom unrelated changes/cleanup to driver are done in patches: mmc: mmci: use NSEC_PER_SEC macro mmc: mmci: convert register bits to use BIT() macro. This patches are tested in PIO mode on IFC8064 board with both eMMC and external SD card. I would like to get this support in v3.16. Changes from v1: - moved most of the SOC specifics to variant parameters as suggested by Linus W. - renamed registers as suggested by Linus W. - Added comments in the code as suggested by Linus W. - moved out AMBA ID addition patch from this series. - rebased the patches to git://git.linaro.org/people/ulf.hansson/mmc.git next as suggested by Ulf H. Changes from RFC: - moved out clk setup out of spinlock as pointed by Stephen B. Thanks, srini Srinivas Kandagatla (14): mmc: mmci: use NSEC_PER_SEC macro mmc: mmci: convert register bits to use BIT() macro. mmc: mmci: Add Qualcomm Id to amba id table mmc: mmci: Add Qcom datactrl register variant mmc: mmci: Add register read/write wrappers. mmc: mmci: Qcomm: Add 3 clock cycle delay after register write mmc: mmci: add ddrmode mask to variant data mmc: mmci: add 8bit bus support in variant data mmc: mmci: add edge support to data and command out in variant data. mmc: mmci: add Qcom specifics of clk and datactrl registers. mmc: mmci: Add support to data commands via variant structure. mmc: mmci: add support for fbclk to latch data and cmd. mmc: mmci: add qcom specific clk control mmc: mmci: Add Qcom specific pio_read function. drivers/mmc/host/mmci.c | 245 drivers/mmc/host/mmci.h | 232 + 2 files changed, 311 insertions(+), 166 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
