On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
> * Shilimkar, Santosh [120817 03:11]:
> > On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
> > wrote:
> > >
> > > On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > > >
> > > > So you expect all the secondary
On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
* Shilimkar, Santosh santosh.shilim...@ti.com [120817 03:11]:
On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
So you
On Fri, 17 Aug 2012, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Nicolas Pitre wrote:
> > Some people will want to use bzip2 or whatever other decompressor du
> > jour. Maybe this shouldn't be gzip specific, or just presented as a
> > possible option?
>
> Good point. Whether this
On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
> * Shilimkar, Santosh [120817 03:11]:
> > On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
> > wrote:
> > >
> > > On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > > >
> > > > So you expect all the secondary
On Fri, Aug 17, 2012 at 12:20:40PM +0100, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Nicolas Pitre wrote:
> > > +3. Decompress the kernel image
> > > +--
> > > +
> > > +Requirement: OPTIONAL
> > > +
> > > +The AArch64 kernel does not provide a decompressor and
* Shilimkar, Santosh [120817 03:11]:
> On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
> wrote:
> >
> > On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > >
> > > So you expect all the secondary CPUs to be in wakeup state and probably
> > > looping in WFE for a signal from
On Thursday 16 August 2012, Nicolas Pitre wrote:
> > +3. Decompress the kernel image
> > +--
> > +
> > +Requirement: OPTIONAL
> > +
> > +The AArch64 kernel does not provide a decompressor and therefore
> > +requires gzip decompression to be performed by the boot loader
On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
wrote:
>
> On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
> > > +The boot loader is expected to enter the kernel on each CPU in the
> > > +following manner:
> > > +
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
> > +The boot loader is expected to enter the kernel on each CPU in the
> > +following manner:
> > +
> > +- The primary CPU must jump directly to the first instruction of
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
* Catalin Marinas [120814 11:00]:
> +3. Decompress the kernel image
> +--
> +
> +Requirement: OPTIONAL
> +
> +The AArch64 kernel does not provide a decompressor and therefore
> +requires gzip decompression to be performed by the boot loader if the
> +default Image.gz
* Catalin Marinas catalin.mari...@arm.com [120814 11:00]:
+3. Decompress the kernel image
+--
+
+Requirement: OPTIONAL
+
+The AArch64 kernel does not provide a decompressor and therefore
+requires gzip decompression to be performed by the boot loader if the
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
+The boot loader is expected to enter the kernel on each CPU in the
+following manner:
+
+- The primary CPU must jump directly to the first instruction of the
+
On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
+The boot loader is expected to enter the kernel on each CPU in the
+following
On Thursday 16 August 2012, Nicolas Pitre wrote:
+3. Decompress the kernel image
+--
+
+Requirement: OPTIONAL
+
+The AArch64 kernel does not provide a decompressor and therefore
+requires gzip decompression to be performed by the boot loader if the
* Shilimkar, Santosh santosh.shilim...@ti.com [120817 03:11]:
On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
So you expect all the secondary CPUs to be in wakeup state and probably
On Fri, Aug 17, 2012 at 12:20:40PM +0100, Arnd Bergmann wrote:
On Thursday 16 August 2012, Nicolas Pitre wrote:
+3. Decompress the kernel image
+--
+
+Requirement: OPTIONAL
+
+The AArch64 kernel does not provide a decompressor and therefore
On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
* Shilimkar, Santosh santosh.shilim...@ti.com [120817 03:11]:
On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
So you
On Fri, 17 Aug 2012, Arnd Bergmann wrote:
On Thursday 16 August 2012, Nicolas Pitre wrote:
Some people will want to use bzip2 or whatever other decompressor du
jour. Maybe this shouldn't be gzip specific, or just presented as a
possible option?
Good point. Whether this should be part
On Tue, 14 Aug 2012, Catalin Marinas wrote:
> The patch adds the kernel booting and the initial setup code.
> Documentation/arm64/booting.txt describes the booting protocol on the
> AArch64 Linux kernel. This is subject to change following the work on
> boot standardisation, ACPI.
>
>
On Wed, Aug 15, 2012 at 02:20:02PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +The AArch64 exception model is made up of a number of exception levels
> > +(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
> > +counterpart. EL2 is the
On Wed, Aug 15, 2012 at 02:20:02PM +0100, Arnd Bergmann wrote:
On Tuesday 14 August 2012, Catalin Marinas wrote:
+The AArch64 exception model is made up of a number of exception levels
+(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
+counterpart. EL2 is the hypervisor
On Tue, 14 Aug 2012, Catalin Marinas wrote:
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
Signed-off-by:
On 15 August 2012 20:03, Olof Johansson wrote:
> On Wed, Aug 15, 2012 at 06:37:11PM +0100, Catalin Marinas wrote:
>> If we add machine_desc structure back, we could print which machine was
>> matched. But so far I try to keep the SoC code to a minimum and just do
>> the probing later in the SoC
Hi,
On Wed, Aug 15, 2012 at 06:37:11PM +0100, Catalin Marinas wrote:
> Hi Olof,
>
> > Given the recent development of ARM platforms, you might want to mandate
> > the state of IOMMUs as well (they should probably be off, since there
> > should be no active DMA activity). Graphics would be the
Hi Olof,
On Wed, Aug 15, 2012 at 12:06:45AM +0100, Olof Johansson wrote:
> On Tue, Aug 14, 2012 at 06:52:03PM +0100, Catalin Marinas wrote:
> > +Before jumping into the kernel, the following conditions must be met:
> > +
> > +- Quiesce all DMA capable devices so that memory does not get
> > +
On Wed, Aug 15, 2012 at 01:20:02PM +, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +The AArch64 exception model is made up of a number of exception levels
> > +(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
> > +counterpart. EL2 is the
On Tuesday 14 August 2012, Catalin Marinas wrote:
> +The AArch64 exception model is made up of a number of exception levels
> +(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
> +counterpart. EL2 is the hypervisor level and exists only in non-secure
> +mode. EL3 is the highest
On Tuesday 14 August 2012, Catalin Marinas wrote:
+The AArch64 exception model is made up of a number of exception levels
+(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
+counterpart. EL2 is the hypervisor level and exists only in non-secure
+mode. EL3 is the highest priority
On Wed, Aug 15, 2012 at 01:20:02PM +, Arnd Bergmann wrote:
On Tuesday 14 August 2012, Catalin Marinas wrote:
+The AArch64 exception model is made up of a number of exception levels
+(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
+counterpart. EL2 is the hypervisor
Hi Olof,
On Wed, Aug 15, 2012 at 12:06:45AM +0100, Olof Johansson wrote:
On Tue, Aug 14, 2012 at 06:52:03PM +0100, Catalin Marinas wrote:
+Before jumping into the kernel, the following conditions must be met:
+
+- Quiesce all DMA capable devices so that memory does not get
+ corrupted
Hi,
On Wed, Aug 15, 2012 at 06:37:11PM +0100, Catalin Marinas wrote:
Hi Olof,
Given the recent development of ARM platforms, you might want to mandate
the state of IOMMUs as well (they should probably be off, since there
should be no active DMA activity). Graphics would be the exception
On 15 August 2012 20:03, Olof Johansson o...@lixom.net wrote:
On Wed, Aug 15, 2012 at 06:37:11PM +0100, Catalin Marinas wrote:
If we add machine_desc structure back, we could print which machine was
matched. But so far I try to keep the SoC code to a minimum and just do
the probing later in
Hi,
On Tue, Aug 14, 2012 at 06:52:03PM +0100, Catalin Marinas wrote:
> +Before jumping into the kernel, the following conditions must be met:
> +
> +- Quiesce all DMA capable devices so that memory does not get
> + corrupted by bogus network packets or disk data. This will save
> + you many
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
Signed-off-by: Will Deacon will.dea...@arm.com
Signed-off-by:
Hi,
On Tue, Aug 14, 2012 at 06:52:03PM +0100, Catalin Marinas wrote:
+Before jumping into the kernel, the following conditions must be met:
+
+- Quiesce all DMA capable devices so that memory does not get
+ corrupted by bogus network packets or disk data. This will save
+ you many hours
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