Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-20 Thread Michael Turquette
Quoting Dmitry Osipenko (2017-12-19 12:20:56) > On 19.12.2017 22:56, Michael Turquette wrote: > > Quoting Dmitry Osipenko (2017-12-18 19:59:06) > >> Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks > >> as critical. Currently some of drivers do not manage clocks properly, >

Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-20 Thread Michael Turquette
Quoting Dmitry Osipenko (2017-12-19 12:20:56) > On 19.12.2017 22:56, Michael Turquette wrote: > > Quoting Dmitry Osipenko (2017-12-18 19:59:06) > >> Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks > >> as critical. Currently some of drivers do not manage clocks properly, >

Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-19 Thread Dmitry Osipenko
On 19.12.2017 22:56, Michael Turquette wrote: > Quoting Dmitry Osipenko (2017-12-18 19:59:06) >> Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks >> as critical. Currently some of drivers do not manage clocks properly, >> expecting clocks to be 'always enabled', these clocks

Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-19 Thread Dmitry Osipenko
On 19.12.2017 22:56, Michael Turquette wrote: > Quoting Dmitry Osipenko (2017-12-18 19:59:06) >> Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks >> as critical. Currently some of drivers do not manage clocks properly, >> expecting clocks to be 'always enabled', these clocks

Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-19 Thread Michael Turquette
Quoting Dmitry Osipenko (2017-12-18 19:59:06) > Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks > as critical. Currently some of drivers do not manage clocks properly, > expecting clocks to be 'always enabled', these clocks are MC and PLL_P > outputs. Let's mark MC or PLL_P

Re: [PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-19 Thread Michael Turquette
Quoting Dmitry Osipenko (2017-12-18 19:59:06) > Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks > as critical. Currently some of drivers do not manage clocks properly, > expecting clocks to be 'always enabled', these clocks are MC and PLL_P > outputs. Let's mark MC or PLL_P

[PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-18 Thread Dmitry Osipenko
Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks as critical. Currently some of drivers do not manage clocks properly, expecting clocks to be 'always enabled', these clocks are MC and PLL_P outputs. Let's mark MC or PLL_P outputs as critical for now and revert this change

[PATCH v2 1/2] clk: tegra: Mark HCLK, SCLK, EMC, MC and PLL_P outputs as critical

2017-12-18 Thread Dmitry Osipenko
Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks as critical. Currently some of drivers do not manage clocks properly, expecting clocks to be 'always enabled', these clocks are MC and PLL_P outputs. Let's mark MC or PLL_P outputs as critical for now and revert this change