Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-13 Thread Mark Rutland
On Tue, Feb 12, 2013 at 08:01:05PM +, Loic PALLARDY wrote:
> Hi Mark,
> 
> Thanks for your comments.
> 
> On 02/12/2013 11:39 AM, Mark Rutland wrote:
> > Hello,
> >
> > I have a few comments on the devicetree binding and the way it's parsed.
> >
> >> +static const struct of_device_id dbx500_mailbox_match[] = {
> >> +   { .compatible = "stericsson,db8500-mailbox",
> >> +   .data = (void *)db8500_mboxes,
> >> +   },
> >> +   { .compatible = "stericsson,db9540-mailbox",
> >> +   .data = (void *)dbx540_mboxes,
> >> +   },
> >> +   { /* sentinel */}
> >> +};
> >> +
> >
> > The binding for the compatible strings above and property parsing below 
> > should
> > be documented.
> >
> Yes you're right. I will add a description in 
> Documentation/devicetree/bindings/mailbox/...

Great!

[...]

> >> +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
> >> "prcm_reg");
> >
> > Does this work for dt? I wasn't aware we got anything more than anonymous
> > memory and interrupts.
> >
> Yes this is working with and without dt.
> dt declaration will be the following
> mailbox {
>   compatible = "stericsson,db8500-mailbox";
>   reg = <0x80157000 0x1000>, <0x801B8000 0x2000>;
>   reg-names = "prcm-reg", "prcmu-tcdm";
>   interrupts = <0 47 0x4>;
>   interrupt-names = "irq";
>   legacy-offset = <0xdd4>;
> };

Ah, I wasn't aware of reg-names. Thanks for the example.

Thanks,
Mark.


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Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-13 Thread Mark Rutland
On Tue, Feb 12, 2013 at 08:01:05PM +, Loic PALLARDY wrote:
 Hi Mark,
 
 Thanks for your comments.
 
 On 02/12/2013 11:39 AM, Mark Rutland wrote:
  Hello,
 
  I have a few comments on the devicetree binding and the way it's parsed.
 
  +static const struct of_device_id dbx500_mailbox_match[] = {
  +   { .compatible = stericsson,db8500-mailbox,
  +   .data = (void *)db8500_mboxes,
  +   },
  +   { .compatible = stericsson,db9540-mailbox,
  +   .data = (void *)dbx540_mboxes,
  +   },
  +   { /* sentinel */}
  +};
  +
 
  The binding for the compatible strings above and property parsing below 
  should
  be documented.
 
 Yes you're right. I will add a description in 
 Documentation/devicetree/bindings/mailbox/...

Great!

[...]

  +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
  prcm_reg);
 
  Does this work for dt? I wasn't aware we got anything more than anonymous
  memory and interrupts.
 
 Yes this is working with and without dt.
 dt declaration will be the following
 mailbox {
   compatible = stericsson,db8500-mailbox;
   reg = 0x80157000 0x1000, 0x801B8000 0x2000;
   reg-names = prcm-reg, prcmu-tcdm;
   interrupts = 0 47 0x4;
   interrupt-names = irq;
   legacy-offset = 0xdd4;
 };

Ah, I wasn't aware of reg-names. Thanks for the example.

Thanks,
Mark.


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Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-12 Thread Loic PALLARDY
Hi Mark,

Thanks for your comments.

On 02/12/2013 11:39 AM, Mark Rutland wrote:
> Hello,
>
> I have a few comments on the devicetree binding and the way it's parsed.
>
>> +static const struct of_device_id dbx500_mailbox_match[] = {
>> +   { .compatible = "stericsson,db8500-mailbox",
>> +   .data = (void *)db8500_mboxes,
>> +   },
>> +   { .compatible = "stericsson,db9540-mailbox",
>> +   .data = (void *)dbx540_mboxes,
>> +   },
>> +   { /* sentinel */}
>> +};
>> +
>
> The binding for the compatible strings above and property parsing below should
> be documented.
>
Yes you're right. I will add a description in 
Documentation/devicetree/bindings/mailbox/...

>> +static int dbx500_mbox_probe(struct platform_device *pdev)
>> +{
>> +   const struct platform_device_id *platid = 
>> platform_get_device_id(pdev);
>> +   struct resource *mem;
>> +   int ret, i, legacy_offset = 0, upap_offset;
>> +   struct mailbox **list;
>> +   int irq;
>> +   struct dbx500_plat_data *pdata = dev_get_platdata(>dev);
>> +   struct device_node *np = pdev->dev.of_node;
>> +
>> +   if (!pdata) {
>> +   if (np) {
>> +   of_property_read_u32(np, "legacy-offset",
>> +_offset);
>
> I see that legacy_offset is initialised to 0, and there's no check on the
> return value of of_property_read_u32. Does that mean this is an optional
> property? This needs to be documented.
>
Correct, I'll add a check. This offset must be compared to shared memory 
size.

>> +   of_property_read_u32(np, "upap-offset",_offset);
>
> However, upap_offset isn't initialised, but there's no check on the return
> value. If "upap-offset" isn't defined in the dt, upap_offset won't have been
> initialised.
Should be documented too. upap_offset is optional since not supported by 
all STE platforms.
Anyway, value must be checked when used.
>
> Is there no basic sanity checking that could be done here? I assume there's a
> maximum offset we expect that's less than 4GB?
>
> Additionally, of_property_read_u32 takes a *u32, not *int. It would be nice to
> be consistent with the interface.
OK
>
> I'm not familiar with the hardware. What's the difference between the legacy
> and upap cases?
Same HW, but different way to access and manage shared memory.
Link to coprocessor firmware version.
>
>> +   list = (struct mailbox **)of_match_device(
>> +   
>> dbx500_mailbox_match,>dev)->data;
>> +   if (!list) {
>> +   /* No mailbox configuration */
>> +   dev_err(>dev, "No configuration 
>> found\n");
>> +   return -ENODEV;
>> +   }
>> +   } else {
>> +   /* No mailbox configuration */
>> +   dev_err(>dev, "No configuration found\n");
>> +   return -ENODEV;
>> +   }
>> +   } else {
>> +   list = (struct mailbox **)platid->driver_data;
>> +   legacy_offset = pdata->legacy_offset;
>> +   upap_offset = pdata->upap_offset;
>> +   }
>> +
>> +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcm_reg");
>
> Does this work for dt? I wasn't aware we got anything more than anonymous
> memory and interrupts.
>
Yes this is working with and without dt.
dt declaration will be the following
mailbox {
compatible = "stericsson,db8500-mailbox";
reg = <0x80157000 0x1000>, <0x801B8000 0x2000>;
reg-names = "prcm-reg", "prcmu-tcdm";
interrupts = <0 47 0x4>;
interrupt-names = "irq";
legacy-offset = <0xdd4>;
};

>> +   mbox_base = devm_ioremap(>dev, mem->start, resource_size(mem));
>> +   if (!mbox_base) {
>> +   ret = -ENOMEM;
>> +   goto out;
>> +   }
>> +
>> +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
>> "prcmu_tcdm");
>
> Same here.
>
> Thanks,
> Mark.
>
Regards,
Loic--
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Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-12 Thread Mark Rutland
Hello,

I have a few comments on the devicetree binding and the way it's parsed.

> +static const struct of_device_id dbx500_mailbox_match[] = {
> +   { .compatible = "stericsson,db8500-mailbox",
> +   .data = (void *)db8500_mboxes,
> +   },
> +   { .compatible = "stericsson,db9540-mailbox",
> +   .data = (void *)dbx540_mboxes,
> +   },
> +   { /* sentinel */}
> +};
> +

The binding for the compatible strings above and property parsing below should
be documented.

> +static int dbx500_mbox_probe(struct platform_device *pdev)
> +{
> +   const struct platform_device_id *platid = 
> platform_get_device_id(pdev);
> +   struct resource *mem;
> +   int ret, i, legacy_offset = 0, upap_offset;
> +   struct mailbox **list;
> +   int irq;
> +   struct dbx500_plat_data *pdata = dev_get_platdata(>dev);
> +   struct device_node *np = pdev->dev.of_node;
> +
> +   if (!pdata) {
> +   if (np) {
> +   of_property_read_u32(np, "legacy-offset",
> +   _offset);

I see that legacy_offset is initialised to 0, and there's no check on the
return value of of_property_read_u32. Does that mean this is an optional
property? This needs to be documented.

> +   of_property_read_u32(np, "upap-offset", _offset);

However, upap_offset isn't initialised, but there's no check on the return
value. If "upap-offset" isn't defined in the dt, upap_offset won't have been
initialised. 

Is there no basic sanity checking that could be done here? I assume there's a
maximum offset we expect that's less than 4GB?

Additionally, of_property_read_u32 takes a *u32, not *int. It would be nice to
be consistent with the interface.

I'm not familiar with the hardware. What's the difference between the legacy
and upap cases?

> +   list = (struct mailbox **)of_match_device(
> +   dbx500_mailbox_match, 
> >dev)->data;
> +   if (!list) {
> +   /* No mailbox configuration */
> +   dev_err(>dev, "No configuration 
> found\n");
> +   return -ENODEV;
> +   }
> +   } else {
> +   /* No mailbox configuration */
> +   dev_err(>dev, "No configuration found\n");
> +   return -ENODEV;
> +   }
> +   } else {
> +   list = (struct mailbox **)platid->driver_data;
> +   legacy_offset = pdata->legacy_offset;
> +   upap_offset = pdata->upap_offset;
> +   }
> +
> +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcm_reg");

Does this work for dt? I wasn't aware we got anything more than anonymous
memory and interrupts.

> +   mbox_base = devm_ioremap(>dev, mem->start, resource_size(mem));
> +   if (!mbox_base) {
> +   ret = -ENOMEM;
> +   goto out;
> +   }
> +
> +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
> "prcmu_tcdm");

Same here.

Thanks,
Mark.

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Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-12 Thread Mark Rutland
Hello,

I have a few comments on the devicetree binding and the way it's parsed.

 +static const struct of_device_id dbx500_mailbox_match[] = {
 +   { .compatible = stericsson,db8500-mailbox,
 +   .data = (void *)db8500_mboxes,
 +   },
 +   { .compatible = stericsson,db9540-mailbox,
 +   .data = (void *)dbx540_mboxes,
 +   },
 +   { /* sentinel */}
 +};
 +

The binding for the compatible strings above and property parsing below should
be documented.

 +static int dbx500_mbox_probe(struct platform_device *pdev)
 +{
 +   const struct platform_device_id *platid = 
 platform_get_device_id(pdev);
 +   struct resource *mem;
 +   int ret, i, legacy_offset = 0, upap_offset;
 +   struct mailbox **list;
 +   int irq;
 +   struct dbx500_plat_data *pdata = dev_get_platdata(pdev-dev);
 +   struct device_node *np = pdev-dev.of_node;
 +
 +   if (!pdata) {
 +   if (np) {
 +   of_property_read_u32(np, legacy-offset,
 +   legacy_offset);

I see that legacy_offset is initialised to 0, and there's no check on the
return value of of_property_read_u32. Does that mean this is an optional
property? This needs to be documented.

 +   of_property_read_u32(np, upap-offset, upap_offset);

However, upap_offset isn't initialised, but there's no check on the return
value. If upap-offset isn't defined in the dt, upap_offset won't have been
initialised. 

Is there no basic sanity checking that could be done here? I assume there's a
maximum offset we expect that's less than 4GB?

Additionally, of_property_read_u32 takes a *u32, not *int. It would be nice to
be consistent with the interface.

I'm not familiar with the hardware. What's the difference between the legacy
and upap cases?

 +   list = (struct mailbox **)of_match_device(
 +   dbx500_mailbox_match, 
 pdev-dev)-data;
 +   if (!list) {
 +   /* No mailbox configuration */
 +   dev_err(pdev-dev, No configuration 
 found\n);
 +   return -ENODEV;
 +   }
 +   } else {
 +   /* No mailbox configuration */
 +   dev_err(pdev-dev, No configuration found\n);
 +   return -ENODEV;
 +   }
 +   } else {
 +   list = (struct mailbox **)platid-driver_data;
 +   legacy_offset = pdata-legacy_offset;
 +   upap_offset = pdata-upap_offset;
 +   }
 +
 +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, prcm_reg);

Does this work for dt? I wasn't aware we got anything more than anonymous
memory and interrupts.

 +   mbox_base = devm_ioremap(pdev-dev, mem-start, resource_size(mem));
 +   if (!mbox_base) {
 +   ret = -ENOMEM;
 +   goto out;
 +   }
 +
 +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
 prcmu_tcdm);

Same here.

Thanks,
Mark.

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Re: [PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-12 Thread Loic PALLARDY
Hi Mark,

Thanks for your comments.

On 02/12/2013 11:39 AM, Mark Rutland wrote:
 Hello,

 I have a few comments on the devicetree binding and the way it's parsed.

 +static const struct of_device_id dbx500_mailbox_match[] = {
 +   { .compatible = stericsson,db8500-mailbox,
 +   .data = (void *)db8500_mboxes,
 +   },
 +   { .compatible = stericsson,db9540-mailbox,
 +   .data = (void *)dbx540_mboxes,
 +   },
 +   { /* sentinel */}
 +};
 +

 The binding for the compatible strings above and property parsing below should
 be documented.

Yes you're right. I will add a description in 
Documentation/devicetree/bindings/mailbox/...

 +static int dbx500_mbox_probe(struct platform_device *pdev)
 +{
 +   const struct platform_device_id *platid = 
 platform_get_device_id(pdev);
 +   struct resource *mem;
 +   int ret, i, legacy_offset = 0, upap_offset;
 +   struct mailbox **list;
 +   int irq;
 +   struct dbx500_plat_data *pdata = dev_get_platdata(pdev-dev);
 +   struct device_node *np = pdev-dev.of_node;
 +
 +   if (!pdata) {
 +   if (np) {
 +   of_property_read_u32(np, legacy-offset,
 +legacy_offset);

 I see that legacy_offset is initialised to 0, and there's no check on the
 return value of of_property_read_u32. Does that mean this is an optional
 property? This needs to be documented.

Correct, I'll add a check. This offset must be compared to shared memory 
size.

 +   of_property_read_u32(np, upap-offset,upap_offset);

 However, upap_offset isn't initialised, but there's no check on the return
 value. If upap-offset isn't defined in the dt, upap_offset won't have been
 initialised.
Should be documented too. upap_offset is optional since not supported by 
all STE platforms.
Anyway, value must be checked when used.

 Is there no basic sanity checking that could be done here? I assume there's a
 maximum offset we expect that's less than 4GB?

 Additionally, of_property_read_u32 takes a *u32, not *int. It would be nice to
 be consistent with the interface.
OK

 I'm not familiar with the hardware. What's the difference between the legacy
 and upap cases?
Same HW, but different way to access and manage shared memory.
Link to coprocessor firmware version.

 +   list = (struct mailbox **)of_match_device(
 +   
 dbx500_mailbox_match,pdev-dev)-data;
 +   if (!list) {
 +   /* No mailbox configuration */
 +   dev_err(pdev-dev, No configuration 
 found\n);
 +   return -ENODEV;
 +   }
 +   } else {
 +   /* No mailbox configuration */
 +   dev_err(pdev-dev, No configuration found\n);
 +   return -ENODEV;
 +   }
 +   } else {
 +   list = (struct mailbox **)platid-driver_data;
 +   legacy_offset = pdata-legacy_offset;
 +   upap_offset = pdata-upap_offset;
 +   }
 +
 +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, prcm_reg);

 Does this work for dt? I wasn't aware we got anything more than anonymous
 memory and interrupts.

Yes this is working with and without dt.
dt declaration will be the following
mailbox {
compatible = stericsson,db8500-mailbox;
reg = 0x80157000 0x1000, 0x801B8000 0x2000;
reg-names = prcm-reg, prcmu-tcdm;
interrupts = 0 47 0x4;
interrupt-names = irq;
legacy-offset = 0xdd4;
};

 +   mbox_base = devm_ioremap(pdev-dev, mem-start, resource_size(mem));
 +   if (!mbox_base) {
 +   ret = -ENOMEM;
 +   goto out;
 +   }
 +
 +   mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, 
 prcmu_tcdm);

 Same here.

 Thanks,
 Mark.

Regards,
Loic--
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[PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-11 Thread Suman Anna
From: Loic Pallardy 

Add STEriccson DBX500 PRCM mailbox support.

Signed-off-by: Loic Pallardy 
Signed-off-by: Linus Walleij 
---
 drivers/mailbox/Kconfig  |   7 +
 drivers/mailbox/Makefile |   1 +
 drivers/mailbox/mailbox-dbx500.c | 611 +++
 include/linux/platform_data/mailbox-dbx500.h |  12 +
 4 files changed, 631 insertions(+)
 create mode 100644 drivers/mailbox/mailbox-dbx500.c
 create mode 100644 include/linux/platform_data/mailbox-dbx500.h

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index c28897d..d352028 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -24,6 +24,12 @@ config OMAP2PLUS_MBOX
  OMAP2/3; or IPU, IVA HD and DSP in OMAP4. Say Y here if you want
  to use OMAP2+ Mailbox framework support.
 
+config DBX500_MBOX
+   tristate "DBx500 Mailbox driver support"
+   depends on ARCH_U8500
+   help
+ Say Y here if you want to use DBx500 Mailbox driver support for
+ power coprocessor access on Ux500 and Ux540 families
 
 config MBOX_KFIFO_SIZE
int "Mailbox kfifo default buffer size (bytes)"
@@ -35,6 +41,7 @@ config MBOX_KFIFO_SIZE
 
 config MBOX_DATA_SIZE
int "Mailbox associated data max size (bytes)"
+   default 64 if DBX500_MBOX
default 4
help
  Specify the default size of mailbox's associated data buffer
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 4085b71..c04ce79 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_MAILBOX) += mailbox.o
 
 obj-$(CONFIG_OMAP1_MBOX)   += mailbox-omap1.o
 obj-$(CONFIG_OMAP2PLUS_MBOX)   += mailbox-omap2.o
+obj-$(CONFIG_DBX500_MBOX)  += mailbox-dbx500.o
diff --git a/drivers/mailbox/mailbox-dbx500.c b/drivers/mailbox/mailbox-dbx500.c
new file mode 100644
index 000..90f91cd
--- /dev/null
+++ b/drivers/mailbox/mailbox-dbx500.c
@@ -0,0 +1,611 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * License Terms: GNU General Public License v2
+ * Author: Loic Pallardy  for ST-Ericsson
+ * DBX500 PRCM Mailbox driver
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mailbox_internal.h"
+
+#define MAILBOX_LEGACY 0
+#define MAILBOX_UPAP   1
+
+enum {
+   MAILBOX_BLOCKING,
+   MAILBOX_ATOMIC,
+};
+
+/* CPU mailbox registers */
+#define PRCM_MBOX_CPU_VAL  0x0fc
+#define PRCM_MBOX_CPU_SET  0x100
+#define PRCM_MBOX_CPU_CLR  0x104
+
+#define PRCM_ARM_IT1_CLR   0x48C
+#define PRCM_ARM_IT1_VAL   0x494
+
+#define NUM_MB 8
+#define MBOX_BIT BIT
+#define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)
+
+/* CPU mailbox share memory */
+#define _PRCM_MBOX_HEADER  0x214 /* 16 bytes */
+#define PRCM_MBOX_HEADER_REQ_MB0   (_PRCM_MBOX_HEADER + 0x0)
+#define PRCM_MBOX_HEADER_REQ_MB1   (_PRCM_MBOX_HEADER + 0x1)
+#define PRCM_MBOX_HEADER_REQ_MB2   (_PRCM_MBOX_HEADER + 0x2)
+#define PRCM_MBOX_HEADER_REQ_MB3   (_PRCM_MBOX_HEADER + 0x3)
+#define PRCM_MBOX_HEADER_REQ_MB4   (_PRCM_MBOX_HEADER + 0x4)
+#define PRCM_MBOX_HEADER_REQ_MB5   (_PRCM_MBOX_HEADER + 0x5)
+#define PRCM_MBOX_HEADER_ACK_MB0   (_PRCM_MBOX_HEADER + 0x8)
+
+/* Req Mailboxes */
+#define PRCM_REQ_MB0   0x208 /* 12 bytes  */
+#define PRCM_REQ_MB1   0x1FC /* 12 bytes  */
+#define PRCM_REQ_MB2   0x1EC /* 16 bytes  */
+#define PRCM_REQ_MB3   0x78  /* 372 bytes  */
+#define PRCM_REQ_MB4   0x74  /* 4 bytes  */
+#define PRCM_REQ_MB5   0x70  /* 4 bytes  */
+#define PRCM_REQ_PASR  0x30 /* 4 bytes */
+
+/* Ack Mailboxes */
+#define PRCM_ACK_MB0   0x34 /* 52 bytes  */
+#define PRCM_ACK_MB1   0x30 /* 4 bytes */
+#define PRCM_ACK_MB2   0x2C /* 4 bytes */
+#define PRCM_ACK_MB3   0x28 /* 4 bytes */
+#define PRCM_ACK_MB4   0x24 /* 4 bytes */
+#define PRCM_ACK_MB5   0x20 /* 4 bytes */
+
+/* Ack Mailboxe sizes */
+#define PRCM_ACK_MB0_SIZE  0x24 /* 52 bytes  */
+#define PRCM_ACK_MB1_SIZE  0x4 /* 4 bytes */
+#define PRCM_ACK_MB2_SIZE  0x1 /* 1 bytes */
+#define PRCM_ACK_MB3_SIZE  0x2 /* 2 bytes */
+#define PRCM_ACK_MB4_SIZE  0x0 /* 0 bytes */
+#define PRCM_ACK_MB5_SIZE  0x4 /* 4 bytes */
+
+static void __iomem *mbox_base;
+static void __iomem *tcdm_mem_base;
+
+static u8 prcm_mbox_irq_mask; /* masked by default */
+static DEFINE_SPINLOCK(prcm_mbox_irqs_lock);
+
+struct dbx500_mbox_priv {
+   int access_mode;
+   int type;
+   int header_size;
+   unsigned inttx_header_offset;
+   unsigned intrx_header_offset;
+   unsigned inttx_offset;

[PATCH v2 10/13] mailbox: create dbx500 mailbox driver

2013-02-11 Thread Suman Anna
From: Loic Pallardy loic.palla...@st.com

Add STEriccson DBX500 PRCM mailbox support.

Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
 drivers/mailbox/Kconfig  |   7 +
 drivers/mailbox/Makefile |   1 +
 drivers/mailbox/mailbox-dbx500.c | 611 +++
 include/linux/platform_data/mailbox-dbx500.h |  12 +
 4 files changed, 631 insertions(+)
 create mode 100644 drivers/mailbox/mailbox-dbx500.c
 create mode 100644 include/linux/platform_data/mailbox-dbx500.h

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index c28897d..d352028 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -24,6 +24,12 @@ config OMAP2PLUS_MBOX
  OMAP2/3; or IPU, IVA HD and DSP in OMAP4. Say Y here if you want
  to use OMAP2+ Mailbox framework support.
 
+config DBX500_MBOX
+   tristate DBx500 Mailbox driver support
+   depends on ARCH_U8500
+   help
+ Say Y here if you want to use DBx500 Mailbox driver support for
+ power coprocessor access on Ux500 and Ux540 families
 
 config MBOX_KFIFO_SIZE
int Mailbox kfifo default buffer size (bytes)
@@ -35,6 +41,7 @@ config MBOX_KFIFO_SIZE
 
 config MBOX_DATA_SIZE
int Mailbox associated data max size (bytes)
+   default 64 if DBX500_MBOX
default 4
help
  Specify the default size of mailbox's associated data buffer
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 4085b71..c04ce79 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_MAILBOX) += mailbox.o
 
 obj-$(CONFIG_OMAP1_MBOX)   += mailbox-omap1.o
 obj-$(CONFIG_OMAP2PLUS_MBOX)   += mailbox-omap2.o
+obj-$(CONFIG_DBX500_MBOX)  += mailbox-dbx500.o
diff --git a/drivers/mailbox/mailbox-dbx500.c b/drivers/mailbox/mailbox-dbx500.c
new file mode 100644
index 000..90f91cd
--- /dev/null
+++ b/drivers/mailbox/mailbox-dbx500.c
@@ -0,0 +1,611 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * License Terms: GNU General Public License v2
+ * Author: Loic Pallardy loic.palla...@st.com for ST-Ericsson
+ * DBX500 PRCM Mailbox driver
+ *
+ */
+
+#include linux/module.h
+#include linux/err.h
+#include linux/platform_device.h
+#include linux/irq.h
+#include linux/io.h
+#include linux/platform_data/mailbox-dbx500.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/irqdomain.h
+
+#include mailbox_internal.h
+
+#define MAILBOX_LEGACY 0
+#define MAILBOX_UPAP   1
+
+enum {
+   MAILBOX_BLOCKING,
+   MAILBOX_ATOMIC,
+};
+
+/* CPU mailbox registers */
+#define PRCM_MBOX_CPU_VAL  0x0fc
+#define PRCM_MBOX_CPU_SET  0x100
+#define PRCM_MBOX_CPU_CLR  0x104
+
+#define PRCM_ARM_IT1_CLR   0x48C
+#define PRCM_ARM_IT1_VAL   0x494
+
+#define NUM_MB 8
+#define MBOX_BIT BIT
+#define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)
+
+/* CPU mailbox share memory */
+#define _PRCM_MBOX_HEADER  0x214 /* 16 bytes */
+#define PRCM_MBOX_HEADER_REQ_MB0   (_PRCM_MBOX_HEADER + 0x0)
+#define PRCM_MBOX_HEADER_REQ_MB1   (_PRCM_MBOX_HEADER + 0x1)
+#define PRCM_MBOX_HEADER_REQ_MB2   (_PRCM_MBOX_HEADER + 0x2)
+#define PRCM_MBOX_HEADER_REQ_MB3   (_PRCM_MBOX_HEADER + 0x3)
+#define PRCM_MBOX_HEADER_REQ_MB4   (_PRCM_MBOX_HEADER + 0x4)
+#define PRCM_MBOX_HEADER_REQ_MB5   (_PRCM_MBOX_HEADER + 0x5)
+#define PRCM_MBOX_HEADER_ACK_MB0   (_PRCM_MBOX_HEADER + 0x8)
+
+/* Req Mailboxes */
+#define PRCM_REQ_MB0   0x208 /* 12 bytes  */
+#define PRCM_REQ_MB1   0x1FC /* 12 bytes  */
+#define PRCM_REQ_MB2   0x1EC /* 16 bytes  */
+#define PRCM_REQ_MB3   0x78  /* 372 bytes  */
+#define PRCM_REQ_MB4   0x74  /* 4 bytes  */
+#define PRCM_REQ_MB5   0x70  /* 4 bytes  */
+#define PRCM_REQ_PASR  0x30 /* 4 bytes */
+
+/* Ack Mailboxes */
+#define PRCM_ACK_MB0   0x34 /* 52 bytes  */
+#define PRCM_ACK_MB1   0x30 /* 4 bytes */
+#define PRCM_ACK_MB2   0x2C /* 4 bytes */
+#define PRCM_ACK_MB3   0x28 /* 4 bytes */
+#define PRCM_ACK_MB4   0x24 /* 4 bytes */
+#define PRCM_ACK_MB5   0x20 /* 4 bytes */
+
+/* Ack Mailboxe sizes */
+#define PRCM_ACK_MB0_SIZE  0x24 /* 52 bytes  */
+#define PRCM_ACK_MB1_SIZE  0x4 /* 4 bytes */
+#define PRCM_ACK_MB2_SIZE  0x1 /* 1 bytes */
+#define PRCM_ACK_MB3_SIZE  0x2 /* 2 bytes */
+#define PRCM_ACK_MB4_SIZE  0x0 /* 0 bytes */
+#define PRCM_ACK_MB5_SIZE  0x4 /* 4 bytes */
+
+static void __iomem *mbox_base;
+static void __iomem *tcdm_mem_base;
+
+static u8 prcm_mbox_irq_mask; /* masked by default */
+static DEFINE_SPINLOCK(prcm_mbox_irqs_lock);
+
+struct dbx500_mbox_priv {
+   int access_mode;
+