On Mon, Jul 11, 2016 at 03:07:24PM -0700, Stephen Boyd wrote:
> On 10 July 2016 at 22:32, Peter Chen wrote:
> > On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
> >> @@ -40,11 +43,38 @@ struct ci_hdrc_msm {
> >> struct clk *iface_clk;
> >> struct
On Mon, Jul 11, 2016 at 03:07:24PM -0700, Stephen Boyd wrote:
> On 10 July 2016 at 22:32, Peter Chen wrote:
> > On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
> >> @@ -40,11 +43,38 @@ struct ci_hdrc_msm {
> >> struct clk *iface_clk;
> >> struct clk *fs_clk;
> >>
On 10 July 2016 at 22:32, Peter Chen wrote:
> On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
>> @@ -40,11 +43,38 @@ struct ci_hdrc_msm {
>> struct clk *iface_clk;
>> struct clk *fs_clk;
>> struct ci_hdrc_platform_data pdata;
>> + struct
On 10 July 2016 at 22:32, Peter Chen wrote:
> On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
>> @@ -40,11 +43,38 @@ struct ci_hdrc_msm {
>> struct clk *iface_clk;
>> struct clk *fs_clk;
>> struct ci_hdrc_platform_data pdata;
>> + struct reset_controller_dev
On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
> The MSM chipidea wrapper has two bits that are used to reset the
> first or second phy. Add support for these bits via the reset
> controller framework, so that phy drivers can reset their
> hardware at the right time during
On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
> The MSM chipidea wrapper has two bits that are used to reset the
> first or second phy. Add support for these bits via the reset
> controller framework, so that phy drivers can reset their
> hardware at the right time during
The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen
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