Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata

2018-12-06 Thread Yang, Shunyong
Hi, Bjorn,
  Gentle ping for these two ID and quirk patches. Would you please help
to review and pull?
  Our PCI id is already registered at PCI SIG, following is the link,
https://pcisig.com/membership/member-companies?combine=1dbf

Thanks.
Shunyong.
On 2018/11/19 9:07, Yang, Shunyong wrote:
> Hi, Bjorn,
>   Would you please help to review and pull these two quirk patches to
> your branch if there is no problem?
> 
> Thanks.
> Shunyong.
> 
> On 2018/11/7 15:24, Yang, Shunyong wrote:
>> The HXT SD4800 PCI controller does not set the Command Completed
>> bit unless writes to the Slot Command register change "Control"
>> bits.
>>
>> This patch adds SD4800 to the quirk.
>>
>> Cc: Joey Zheng 
>> Signed-off-by: Shunyong Yang 
>>
>> diff --git a/drivers/pci/hotplug/pciehp_hpc.c 
>> b/drivers/pci/hotplug/pciehp_hpc.c
>> index 7dd443aea5a5..91db67963aea 100644
>> --- a/drivers/pci/hotplug/pciehp_hpc.c
>> +++ b/drivers/pci/hotplug/pciehp_hpc.c
>> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>>PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>>PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
>> +  PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>
> 
> 



Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata

2018-11-20 Thread Yang, Shunyong
Hi, Keith,

Following is the discussion adding the first quirk in this file,

https://lore.kernel.org/lkml/8770820b-85a0-172b-7230-3a44524e6...@molgen.mpg.de/T/#u


>From the discussion, I guess putting the code here is to make it just
the quirk for pcie hotplug.

Thanks.
Shunyong.
On 2018/11/20 0:19, Keith Busch wrote:
> On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote:
>> The HXT SD4800 PCI controller does not set the Command Completed
>> bit unless writes to the Slot Command register change "Control"
>> bits.
>>
>> This patch adds SD4800 to the quirk.
>>
>> Cc: Joey Zheng 
>> Signed-off-by: Shunyong Yang 
>>
>> diff --git a/drivers/pci/hotplug/pciehp_hpc.c 
>> b/drivers/pci/hotplug/pciehp_hpc.c
>> index 7dd443aea5a5..91db67963aea 100644
>> --- a/drivers/pci/hotplug/pciehp_hpc.c
>> +++ b/drivers/pci/hotplug/pciehp_hpc.c
>> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>>PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>>PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
>> +  PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> 
> I guess you're just appending to where this quirk is already defined,
> but why are the quirks even in the core driver instead of pci/quirks.c?
> 



Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata

2018-11-19 Thread Keith Busch
On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
> 
> This patch adds SD4800 to the quirk.
> 
> Cc: Joey Zheng 
> Signed-off-by: Shunyong Yang 
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c 
> b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> +   PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);

I guess you're just appending to where this quirk is already defined,
but why are the quirks even in the core driver instead of pci/quirks.c?


Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata

2018-11-18 Thread Yang, Shunyong
Hi, Bjorn,
  Would you please help to review and pull these two quirk patches to
your branch if there is no problem?

Thanks.
Shunyong.

On 2018/11/7 15:24, Yang, Shunyong wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
> 
> This patch adds SD4800 to the quirk.
> 
> Cc: Joey Zheng 
> Signed-off-by: Shunyong Yang 
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c 
> b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> +   PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> 



[PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed errata

2018-11-06 Thread Shunyong Yang
The HXT SD4800 PCI controller does not set the Command Completed
bit unless writes to the Slot Command register change "Control"
bits.

This patch adds SD4800 to the quirk.

Cc: Joey Zheng 
Signed-off-by: Shunyong Yang 

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7dd443aea5a5..91db67963aea 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
  PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
  PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
+ PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
-- 
1.8.3.1