[PATCH v2 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

The drive and sample phases are generated by dividing an upstream parent clock by 2, this allows us to adjust the phase by 90 deg. There's also an option to have up to 255 delay elements (40-80 picoseconds long). This driver uses those elements (under the assumption that they're 60ps long) to

[PATCH v2 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

The drive and sample phases are generated by dividing an upstream parent clock by 2, this allows us to adjust the phase by 90 deg. There's also an option to have up to 255 delay elements (40-80 picoseconds long). This driver uses those elements (under the assumption that they're 60ps long) to