Re: [PATCH v2 2/3] net: dsa: mv88e6xxx: Support serdes ports on MV88E6097/6095/6185

2020-10-19 Thread Andrew Lunn 
On Mon, Oct 19, 2020 at 03:43:54PM +1300, Chris Packham wrote:
> Implement serdes_power, serdes_get_lane and serdes_pcs_get_state ops for
> the MV88E6097/6095/6185 so that ports 8 & 9 can be supported as serdes
> ports and directly connected to other network interfaces or to SFPs
> without a PHY.
> 
> Signed-off-by: Chris Packham 

Reviewed-by: Andrew Lunn 

Just a nit pick below.

> +int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
> +bool up)
> +{
> + /* The serdes power can't be controlled on this switch chip but we need
> +  * to supply this function to avoid returning -EOPNOTSUPP in
> +  * mv88e6xxx_serdes_power_up/mv88e6xxx_serdes_power_down
> +  */
> + return 0;
> +}
> +
> +u8 mv88e6185_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
> +{
> + switch (chip->ports[port].cmode) {
> + case MV88E6185_PORT_STS_CMODE_SERDES:
> + case MV88E6185_PORT_STS_CMODE_1000BASE_X:
> + return 0xff; /* Unused */
> + default:
> + return 0;
> + }
> +}

mv88e6185_serdes_power() has a nice comment about why it exists and
just returns 0. It would be nice to have something similar here, that
there are no SERDES lane registers, but something other than 0 has to
be returned to indicate there is in fact a SERDES for the given port.

   Andrew

[PATCH v2 2/3] net: dsa: mv88e6xxx: Support serdes ports on MV88E6097/6095/6185

2020-10-18 Thread Chris Packham 
Implement serdes_power, serdes_get_lane and serdes_pcs_get_state ops for
the MV88E6097/6095/6185 so that ports 8 & 9 can be supported as serdes
ports and directly connected to other network interfaces or to SFPs
without a PHY.

Signed-off-by: Chris Packham 
---

Changes in v2:
- expand support to cover 6095 and 6185
- move serdes related code to serdes.c

 drivers/net/dsa/mv88e6xxx/chip.c   |  9 +
 drivers/net/dsa/mv88e6xxx/serdes.c | 58 ++
 drivers/net/dsa/mv88e6xxx/serdes.h |  5 +++
 3 files changed, 72 insertions(+)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 1ef392ee52c5..62d4d7b5d9ac 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3496,6 +3496,9 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
.stats_get_strings = mv88e6095_stats_get_strings,
.stats_get_stats = mv88e6095_stats_get_stats,
.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
+   .serdes_power = mv88e6185_serdes_power,
+   .serdes_get_lane = mv88e6185_serdes_get_lane,
+   .serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
.ppu_enable = mv88e6185_g1_ppu_enable,
.ppu_disable = mv88e6185_g1_ppu_disable,
.reset = mv88e6185_g1_reset,
@@ -3534,6 +3537,9 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
.set_egress_port = mv88e6095_g1_set_egress_port,
.watchdog_ops = _watchdog_ops,
.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
+   .serdes_power = mv88e6185_serdes_power,
+   .serdes_get_lane = mv88e6185_serdes_get_lane,
+   .serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
.pot_clear = mv88e6xxx_g2_pot_clear,
.reset = mv88e6352_g1_reset,
.rmu_disable = mv88e6085_g1_rmu_disable,
@@ -3958,6 +3964,9 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
.set_egress_port = mv88e6095_g1_set_egress_port,
.watchdog_ops = _watchdog_ops,
.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,
+   .serdes_power = mv88e6185_serdes_power,
+   .serdes_get_lane = mv88e6185_serdes_get_lane,
+   .serdes_pcs_get_state = mv88e6185_serdes_pcs_get_state,
.set_cascade_port = mv88e6185_g1_set_cascade_port,
.ppu_enable = mv88e6185_g1_ppu_enable,
.ppu_disable = mv88e6185_g1_ppu_disable,
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c 
b/drivers/net/dsa/mv88e6xxx/serdes.c
index 9c07b4f3d345..2d52c8ede943 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.c
+++ b/drivers/net/dsa/mv88e6xxx/serdes.c
@@ -428,6 +428,64 @@ u8 mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, 
int port)
return lane;
 }
 
+int mv88e6185_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
+  bool up)
+{
+   /* The serdes power can't be controlled on this switch chip but we need
+* to supply this function to avoid returning -EOPNOTSUPP in
+* mv88e6xxx_serdes_power_up/mv88e6xxx_serdes_power_down
+*/
+   return 0;
+}
+
+u8 mv88e6185_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
+{
+   switch (chip->ports[port].cmode) {
+   case MV88E6185_PORT_STS_CMODE_SERDES:
+   case MV88E6185_PORT_STS_CMODE_1000BASE_X:
+   return 0xff; /* Unused */
+   default:
+   return 0;
+   }
+}
+
+int mv88e6185_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
+  u8 lane, struct phylink_link_state *state)
+{
+   int err;
+   u16 status;
+
+   err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, );
+   if (err)
+   return err;
+
+   state->link = !!(status & MV88E6XXX_PORT_STS_LINK);
+
+   if (state->link) {
+   state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ? 
DUPLEX_FULL : DUPLEX_HALF;
+
+   switch (status &  MV88E6XXX_PORT_STS_SPEED_MASK) {
+   case MV88E6XXX_PORT_STS_SPEED_1000:
+   state->speed = SPEED_1000;
+   break;
+   case MV88E6XXX_PORT_STS_SPEED_100:
+   state->speed = SPEED_100;
+   break;
+   case MV88E6XXX_PORT_STS_SPEED_10:
+   state->speed = SPEED_10;
+   break;
+   default:
+   dev_err(chip->dev, "invalid PHY speed\n");
+   return -EINVAL;
+   }
+   } else {
+   state->duplex = DUPLEX_UNKNOWN;
+   state->speed = SPEED_UNKNOWN;
+   }
+
+   return 0;
+}
+
 u8 mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
 {
u8 cmode = chip->ports[port].cmode;
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h 
b/drivers/net/dsa/mv88e6xxx/serdes.h
index 14315f26228a..c24ec4122c9e 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.h
+++ b/drivers/net/dsa/mv88e6xxx/serdes.h
@@ -73,6 +73,7 @@
 #define MV88E6390_PG_CONTROL