Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit

2020-09-18 Thread Catalin Marinas
On Thu, Sep 17, 2020 at 07:47:59PM +0100, Vincenzo Frascino wrote: > On 9/17/20 5:52 PM, Catalin Marinas wrote: > >> +void mte_init_tags(u64 max_tag) > >> +{ > >> + u64 incl = GENMASK(max_tag & MTE_TAG_MAX, 0); > >> + > >> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; > >> +} > > Do we need

Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit

2020-09-17 Thread Vincenzo Frascino
On 9/17/20 5:52 PM, Catalin Marinas wrote: >> +void mte_init_tags(u64 max_tag) >> +{ >> +u64 incl = GENMASK(max_tag & MTE_TAG_MAX, 0); >> + >> +gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; >> +} > Do we need to set the actual GCR_EL1 register here? We may not get an > exception by the

Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit

2020-09-17 Thread Catalin Marinas
On Thu, Sep 17, 2020 at 05:52:21PM +0100, Catalin Marinas wrote: > On Tue, Sep 15, 2020 at 11:16:09PM +0200, Andrey Konovalov wrote: > > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > > index ff34461524d4..79a6848840bd 100644 > > --- a/arch/arm64/kernel/entry.S > > +++

Re: [PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit

2020-09-17 Thread Catalin Marinas
On Tue, Sep 15, 2020 at 11:16:09PM +0200, Andrey Konovalov wrote: > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index eca06b8c74db..3602ac45d093 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -1721,6 +1721,9 @@ static

[PATCH v2 27/37] arm64: mte: Switch GCR_EL1 in kernel entry and exit

2020-09-15 Thread Andrey Konovalov
From: Vincenzo Frascino When MTE is present, the GCR_EL1 register contains the tags mask that allows to exclude tags from the random generation via the IRG instruction. With the introduction of the new Tag-Based KASAN API that provides a mechanism to reserve tags for special reasons, the MTE