m41txx chips can hold a calibration value to get correct clock bias.
If positive offset is passed, it means adding 512 cycles(@32.768Hz)
every tick(1s).
If negative offset is passed, it means subtracting 256 cycles(@32.768Hz)
every tick(1s).
Add offset handling (ranging between (-31) and 31) via
m41txx chips can hold a calibration value to get correct clock bias.
If positive offset is passed, it means adding 512 cycles(@32.768Hz)
every tick(1s).
If negative offset is passed, it means subtracting 256 cycles(@32.768Hz)
every tick(1s).
Add offset handling (ranging between (-31) and 31) via
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