Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Joshua Clayton
Hi Moritz, Thanks for the review. On 10/28/2016 10:41 AM, Moritz Fischer wrote: > Hi Joshua, > > looks good to me; however, I think since you're adding initial support, > I'd squash this together with [3/5]. I agree. I didn't want to squash it in before putting it up for review, though. > > On

Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Joshua Clayton
Hi Moritz, Thanks for the review. On 10/28/2016 10:41 AM, Moritz Fischer wrote: > Hi Joshua, > > looks good to me; however, I think since you're adding initial support, > I'd squash this together with [3/5]. I agree. I didn't want to squash it in before putting it up for review, though. > > On

Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Moritz Fischer
Hi Joshua, looks good to me; however, I think since you're adding initial support, I'd squash this together with [3/5]. On Fri, Oct 28, 2016 at 09:56:42AM -0700, Joshua Clayton wrote: > The status pin may not show ready in the time described in the > Altetera manual. check the value several

Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Moritz Fischer
Hi Joshua, looks good to me; however, I think since you're adding initial support, I'd squash this together with [3/5]. On Fri, Oct 28, 2016 at 09:56:42AM -0700, Joshua Clayton wrote: > The status pin may not show ready in the time described in the > Altetera manual. check the value several

[PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Joshua Clayton
The status pin may not show ready in the time described in the Altetera manual. check the value several times before giving up For the hardware I am working on, the status pin takes 250 us, 5 times as long as described by Altera. Signed-off-by: Joshua Clayton ---

[PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable

2016-10-28 Thread Joshua Clayton
The status pin may not show ready in the time described in the Altetera manual. check the value several times before giving up For the hardware I am working on, the status pin takes 250 us, 5 times as long as described by Altera. Signed-off-by: Joshua Clayton --- drivers/fpga/cyclone-ps-spi.c |