subject:"\[PATCH v2 6\/8\] arm64\: zynqmp\: Add support for Xilinx zcu111\-revA"

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-03-02 Thread Rob Herring

On Fri, Feb 23, 2018 at 03:40:28PM +0100, Michal Simek wrote:
> Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
> 
> Signed-off-by: Michal Simek 
> ---
> 
> Changes in v2:
> - Remove i2c mw u-boot commands
> - Use i2c-mux instead of i2cswitch
> - Use clock generator without numbers.
> - Record compatible string to xilinx.txt
> 
>  Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
>  arch/arm64/boot/dts/xilinx/Makefile   |   1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 
> ++
>  3 files changed, 450 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> 
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
> b/Documentation/devicetree/bindings/arm/xilinx.txt
> index 8503fabf90ee..c2bc75774010 100644
> --- a/Documentation/devicetree/bindings/arm/xilinx.txt
> +++ b/Documentation/devicetree/bindings/arm/xilinx.txt
> @@ -32,3 +32,6 @@ Additional compatible strings:
>  
>  - Xilinx evaluation board zcu106
>"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
> +
> +- Xilinx evaluation board zcu111
> +  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
> b/arch/arm64/boot/dts/xilinx/Makefile
> index 922c5da39600..d15c9dc1d8f2 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> new file mode 100644
> index ..f07f6dafb417
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -0,0 +1,446 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Xilinx ZynqMP ZCU111
> + *
> + * (C) Copyright 2017 - 2018, Xilinx, Inc.
> + *
> + * Michal Simek 
> + */
> +
> +/dts-v1/;
> +
> +#include "zynqmp.dtsi"
> +#include "zynqmp-clk.dtsi"
> +#include 
> +#include 
> +
> +/ {
> + model = "ZynqMP ZCU111 RevA";
> + compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
> "xlnx,zynqmp";
> +
> + aliases {
> + ethernet0 = 
> + gpio0 = 
> + i2c0 = 
> + i2c1 = 
> + mmc0 = 
> + rtc0 = 
> + serial0 = 
> + serial1 = 
> + usb0 = 

And here too.

Reviewed-by: Rob Herring

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-03-02 Thread Rob Herring

On Fri, Feb 23, 2018 at 03:40:28PM +0100, Michal Simek wrote:
> Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
> 
> Signed-off-by: Michal Simek 
> ---
> 
> Changes in v2:
> - Remove i2c mw u-boot commands
> - Use i2c-mux instead of i2cswitch
> - Use clock generator without numbers.
> - Record compatible string to xilinx.txt
> 
>  Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
>  arch/arm64/boot/dts/xilinx/Makefile   |   1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 
> ++
>  3 files changed, 450 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> 
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
> b/Documentation/devicetree/bindings/arm/xilinx.txt
> index 8503fabf90ee..c2bc75774010 100644
> --- a/Documentation/devicetree/bindings/arm/xilinx.txt
> +++ b/Documentation/devicetree/bindings/arm/xilinx.txt
> @@ -32,3 +32,6 @@ Additional compatible strings:
>  
>  - Xilinx evaluation board zcu106
>"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
> +
> +- Xilinx evaluation board zcu111
> +  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
> b/arch/arm64/boot/dts/xilinx/Makefile
> index 922c5da39600..d15c9dc1d8f2 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> new file mode 100644
> index ..f07f6dafb417
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -0,0 +1,446 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Xilinx ZynqMP ZCU111
> + *
> + * (C) Copyright 2017 - 2018, Xilinx, Inc.
> + *
> + * Michal Simek 
> + */
> +
> +/dts-v1/;
> +
> +#include "zynqmp.dtsi"
> +#include "zynqmp-clk.dtsi"
> +#include 
> +#include 
> +
> +/ {
> + model = "ZynqMP ZCU111 RevA";
> + compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
> "xlnx,zynqmp";
> +
> + aliases {
> + ethernet0 = 
> + gpio0 = 
> + i2c0 = 
> + i2c1 = 
> + mmc0 = 
> + rtc0 = 
> + serial0 = 
> + serial1 = 
> + usb0 = 

And here too.

Reviewed-by: Rob Herring

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-03-02 Thread Rob Herring

On Fri, Feb 23, 2018 at 03:40:28PM +0100, Michal Simek wrote:
> Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
> 
> Signed-off-by: Michal Simek 
> ---
> 
> Changes in v2:
> - Remove i2c mw u-boot commands
> - Use i2c-mux instead of i2cswitch
> - Use clock generator without numbers.
> - Record compatible string to xilinx.txt
> 
>  Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
>  arch/arm64/boot/dts/xilinx/Makefile   |   1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 
> ++
>  3 files changed, 450 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> 
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
> b/Documentation/devicetree/bindings/arm/xilinx.txt
> index 8503fabf90ee..c2bc75774010 100644
> --- a/Documentation/devicetree/bindings/arm/xilinx.txt
> +++ b/Documentation/devicetree/bindings/arm/xilinx.txt
> @@ -32,3 +32,6 @@ Additional compatible strings:
>  
>  - Xilinx evaluation board zcu106
>"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
> +
> +- Xilinx evaluation board zcu111
> +  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
> b/arch/arm64/boot/dts/xilinx/Makefile
> index 922c5da39600..d15c9dc1d8f2 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> new file mode 100644
> index ..f07f6dafb417
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -0,0 +1,446 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Xilinx ZynqMP ZCU111
> + *
> + * (C) Copyright 2017 - 2018, Xilinx, Inc.
> + *
> + * Michal Simek 
> + */
> +
> +/dts-v1/;
> +
> +#include "zynqmp.dtsi"
> +#include "zynqmp-clk.dtsi"
> +#include 
> +#include 
> +
> +/ {
> + model = "ZynqMP ZCU111 RevA";
> + compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
> "xlnx,zynqmp";
> +
> + aliases {
> + ethernet0 = 
> + gpio0 = 
> + i2c0 = 
> + i2c1 = 
> + mmc0 = 
> + rtc0 = 
> + serial0 = 
> + serial1 = 
> + usb0 = 

Same comments on aliases.

Otherwise,

Reviewed-by: Rob Herring

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-03-02 Thread Rob Herring

On Fri, Feb 23, 2018 at 03:40:28PM +0100, Michal Simek wrote:
> Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
> 
> Signed-off-by: Michal Simek 
> ---
> 
> Changes in v2:
> - Remove i2c mw u-boot commands
> - Use i2c-mux instead of i2cswitch
> - Use clock generator without numbers.
> - Record compatible string to xilinx.txt
> 
>  Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
>  arch/arm64/boot/dts/xilinx/Makefile   |   1 +
>  arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 
> ++
>  3 files changed, 450 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> 
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
> b/Documentation/devicetree/bindings/arm/xilinx.txt
> index 8503fabf90ee..c2bc75774010 100644
> --- a/Documentation/devicetree/bindings/arm/xilinx.txt
> +++ b/Documentation/devicetree/bindings/arm/xilinx.txt
> @@ -32,3 +32,6 @@ Additional compatible strings:
>  
>  - Xilinx evaluation board zcu106
>"xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
> +
> +- Xilinx evaluation board zcu111
> +  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
> b/arch/arm64/boot/dts/xilinx/Makefile
> index 922c5da39600..d15c9dc1d8f2 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> new file mode 100644
> index ..f07f6dafb417
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -0,0 +1,446 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Xilinx ZynqMP ZCU111
> + *
> + * (C) Copyright 2017 - 2018, Xilinx, Inc.
> + *
> + * Michal Simek 
> + */
> +
> +/dts-v1/;
> +
> +#include "zynqmp.dtsi"
> +#include "zynqmp-clk.dtsi"
> +#include 
> +#include 
> +
> +/ {
> + model = "ZynqMP ZCU111 RevA";
> + compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
> "xlnx,zynqmp";
> +
> + aliases {
> + ethernet0 = 
> + gpio0 = 
> + i2c0 = 
> + i2c1 = 
> + mmc0 = 
> + rtc0 = 
> + serial0 = 
> + serial1 = 
> + usb0 = 

Same comments on aliases.

Otherwise,

Reviewed-by: Rob Herring

[PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-02-23 Thread Michal Simek

Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek 
---

Changes in v2:
- Remove i2c mw u-boot commands
- Use i2c-mux instead of i2cswitch
- Use clock generator without numbers.
- Record compatible string to xilinx.txt

 Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
 arch/arm64/boot/dts/xilinx/Makefile   |   1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 ++
 3 files changed, 450 insertions(+)
 create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts

diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
b/Documentation/devicetree/bindings/arm/xilinx.txt
index 8503fabf90ee..c2bc75774010 100644
--- a/Documentation/devicetree/bindings/arm/xilinx.txt
+++ b/Documentation/devicetree/bindings/arm/xilinx.txt
@@ -32,3 +32,6 @@ Additional compatible strings:
 
 - Xilinx evaluation board zcu106
   "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
+
+- Xilinx evaluation board zcu111
+  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
b/arch/arm64/boot/dts/xilinx/Makefile
index 922c5da39600..d15c9dc1d8f2 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
new file mode 100644
index ..f07f6dafb417
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -0,0 +1,446 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP ZCU111
+ *
+ * (C) Copyright 2017 - 2018, Xilinx, Inc.
+ *
+ * Michal Simek 
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk.dtsi"
+#include 
+#include 
+
+/ {
+   model = "ZynqMP ZCU111 RevA";
+   compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
"xlnx,zynqmp";
+
+   aliases {
+   ethernet0 = 
+   gpio0 = 
+   i2c0 = 
+   i2c1 = 
+   mmc0 = 
+   rtc0 = 
+   serial0 = 
+   serial1 = 
+   usb0 = 
+   };
+
+   chosen {
+   bootargs = "earlycon";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>, <0x8 0x 0x0 0x8000>;
+   /* Another 4GB connected to PL */
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   autorepeat;
+   sw19 {
+   label = "sw19";
+   gpios = < 22 GPIO_ACTIVE_HIGH>;
+   linux,code = ;
+   gpio-key,wakeup;
+   autorepeat;
+   };
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   heartbeat_led {
+   label = "heartbeat";
+   gpios = < 23 GPIO_ACTIVE_HIGH>;
+   linux,default-trigger = "heartbeat";
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
+
+_dma_chan1 {
+   status = "okay";
+};
+
+_dma_chan2 {
+   status = "okay";
+};
+
+_dma_chan3 {
+   status = "okay";
+};
+
+_dma_chan4 {
+   status = "okay";
+};
+
+_dma_chan5 {
+   status = "okay";
+};
+
+_dma_chan6 {
+   status = "okay";
+};
+
+_dma_chan7 {
+   status = "okay";
+};
+
+_dma_chan8 {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   phy-handle = <>;
+   phy-mode = "rgmii-id";
+   phy0: phy@c {
+   reg = <0xc>;
+   ti,rx-internal-delay = <0x8>;
+   ti,tx-internal-delay = <0xa>;
+   ti,fifo-depth = <0x1>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   clock-frequency = <40>;
+
+   tca6416_u22: gpio@20 {
+   compatible = "ti,tca6416";
+   reg = <0x20>;
+   gpio-controller; /* interrupt not connected */
+   #gpio-cells = <2>;
+   /*
+* IRQ not connected
+* Lines:
+* 0 - MAX6643_OT_B
+* 1 - MAX6643_FANFAIL_B
+* 2 - MIO26_PMU_INPUT_LS
+* 4 - SFP_SI5382_INT_ALM
+* 5 - IIC_MUX_RESET_B
+* 6 - GEM3_EXP_RESET_B
+* 10 - FMCP_HSPC_PRSNT_M2C_B
+* 11 - CLK_SPI_MUX_SEL0
+* 12 - CLK_SPI_MUX_SEL1
+* 16 -

[PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

2018-02-23 Thread Michal Simek

Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek 
---

Changes in v2:
- Remove i2c mw u-boot commands
- Use i2c-mux instead of i2cswitch
- Use clock generator without numbers.
- Record compatible string to xilinx.txt

 Documentation/devicetree/bindings/arm/xilinx.txt  |   3 +
 arch/arm64/boot/dts/xilinx/Makefile   |   1 +
 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 ++
 3 files changed, 450 insertions(+)
 create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts

diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt 
b/Documentation/devicetree/bindings/arm/xilinx.txt
index 8503fabf90ee..c2bc75774010 100644
--- a/Documentation/devicetree/bindings/arm/xilinx.txt
+++ b/Documentation/devicetree/bindings/arm/xilinx.txt
@@ -32,3 +32,6 @@ Additional compatible strings:
 
 - Xilinx evaluation board zcu106
   "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
+
+- Xilinx evaluation board zcu111
+  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
diff --git a/arch/arm64/boot/dts/xilinx/Makefile 
b/arch/arm64/boot/dts/xilinx/Makefile
index 922c5da39600..d15c9dc1d8f2 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts 
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
new file mode 100644
index ..f07f6dafb417
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -0,0 +1,446 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP ZCU111
+ *
+ * (C) Copyright 2017 - 2018, Xilinx, Inc.
+ *
+ * Michal Simek 
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk.dtsi"
+#include 
+#include 
+
+/ {
+   model = "ZynqMP ZCU111 RevA";
+   compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", 
"xlnx,zynqmp";
+
+   aliases {
+   ethernet0 = 
+   gpio0 = 
+   i2c0 = 
+   i2c1 = 
+   mmc0 = 
+   rtc0 = 
+   serial0 = 
+   serial1 = 
+   usb0 = 
+   };
+
+   chosen {
+   bootargs = "earlycon";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>, <0x8 0x 0x0 0x8000>;
+   /* Another 4GB connected to PL */
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   autorepeat;
+   sw19 {
+   label = "sw19";
+   gpios = < 22 GPIO_ACTIVE_HIGH>;
+   linux,code = ;
+   gpio-key,wakeup;
+   autorepeat;
+   };
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   heartbeat_led {
+   label = "heartbeat";
+   gpios = < 23 GPIO_ACTIVE_HIGH>;
+   linux,default-trigger = "heartbeat";
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
+
+_dma_chan1 {
+   status = "okay";
+};
+
+_dma_chan2 {
+   status = "okay";
+};
+
+_dma_chan3 {
+   status = "okay";
+};
+
+_dma_chan4 {
+   status = "okay";
+};
+
+_dma_chan5 {
+   status = "okay";
+};
+
+_dma_chan6 {
+   status = "okay";
+};
+
+_dma_chan7 {
+   status = "okay";
+};
+
+_dma_chan8 {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   phy-handle = <>;
+   phy-mode = "rgmii-id";
+   phy0: phy@c {
+   reg = <0xc>;
+   ti,rx-internal-delay = <0x8>;
+   ti,tx-internal-delay = <0xa>;
+   ti,fifo-depth = <0x1>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   clock-frequency = <40>;
+
+   tca6416_u22: gpio@20 {
+   compatible = "ti,tca6416";
+   reg = <0x20>;
+   gpio-controller; /* interrupt not connected */
+   #gpio-cells = <2>;
+   /*
+* IRQ not connected
+* Lines:
+* 0 - MAX6643_OT_B
+* 1 - MAX6643_FANFAIL_B
+* 2 - MIO26_PMU_INPUT_LS
+* 4 - SFP_SI5382_INT_ALM
+* 5 - IIC_MUX_RESET_B
+* 6 - GEM3_EXP_RESET_B
+* 10 - FMCP_HSPC_PRSNT_M2C_B
+* 11 - CLK_SPI_MUX_SEL0
+* 12 - CLK_SPI_MUX_SEL1
+* 16 - IRPS5401_ALERT_B
+* 17 -

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

Re: [PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

[PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

[PATCH v2 6/8] arm64: zynqmp: Add support for Xilinx zcu111-revA

6 matches

Site Navigation

Mail list logo

Footer information