Hi,
On Mon, Sep 29, 2014 at 10:30 AM, Sonny Rao wrote:
> On Fri, Sep 26, 2014 at 3:00 AM, Mark Rutland wrote:
>> On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
>>> +** Optional properties:
>>> +
>>> +- arm,use-physical-timer : Don't ever use the virtual timer, just use the
>>> +
Hi,
On Mon, Sep 29, 2014 at 10:30 AM, Sonny Rao sonny...@chromium.org wrote:
On Fri, Sep 26, 2014 at 3:00 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
+** Optional properties:
+
+- arm,use-physical-timer : Don't ever use the
On Fri, Sep 26, 2014 at 3:00 AM, Mark Rutland wrote:
> On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
>> Some 32-bit (ARMv7) systems are architected like this:
>>
>> * The firmware doesn't know and doesn't care about hypervisor mode and
>> we don't want to add the complexity of
Hi Doug,
On 09/11/2014 01:00 PM, Doug Anderson wrote:
> Some 32-bit (ARMv7) systems are architected like this:
>
> * The firmware doesn't know and doesn't care about hypervisor mode and
> we don't want to add the complexity of hypervisor there.
>
> * The firmware isn't involved in SMP bringup
Hi Doug,
On 09/11/2014 01:00 PM, Doug Anderson wrote:
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or
On Fri, Sep 26, 2014 at 3:00 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the
On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
> Some 32-bit (ARMv7) systems are architected like this:
>
> * The firmware doesn't know and doesn't care about hypervisor mode and
> we don't want to add the complexity of hypervisor there.
>
> * The firmware isn't involved in SMP
On Thu, Sep 11, 2014 at 06:00:01PM +0100, Doug Anderson wrote:
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset
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