> Can we probe safely for this device?
99% of the time yes the inb gives us a straight answer. However (and
we've hit this with port 0x81 for real) there are concerns that some
systems will trap those addresses into SMM and do weirdness that makes
the 0xFF check fail.
Alan
> Can we probe safely for this device?
99% of the time yes the inb gives us a straight answer. However (and
we've hit this with port 0x81 for real) there are concerns that some
systems will trap those addresses into SMM and do weirdness that makes
the 0xFF check fail.
Alan
> Please explain WHY 2017 is the cut-off date. I still have no clue how
> that
> is decided aside of being a random number.
Because if it's prior to 2017 then it'll almost certainly have those
registers even if the firmware says otherwise. After that point we
think the firmware is going to give
> Please explain WHY 2017 is the cut-off date. I still have no clue how
> that
> is decided aside of being a random number.
Because if it's prior to 2017 then it'll almost certainly have those
registers even if the firmware says otherwise. After that point we
think the firmware is going to give
On Mon, Mar 26, 2018 at 03:34:44AM -0700, h...@zytor.com wrote:
> On March 26, 2018 2:11:51 AM PDT, Thomas Gleixner wrote:
> >On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
> >
> >> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> >> > On Thu, 22 Mar 2018,
On Mon, Mar 26, 2018 at 03:34:44AM -0700, h...@zytor.com wrote:
> On March 26, 2018 2:11:51 AM PDT, Thomas Gleixner wrote:
> >On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
> >
> >> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> >> > On Thu, 22 Mar 2018, Anshuman Gupta wrote:
>
On March 26, 2018 2:11:51 AM PDT, Thomas Gleixner wrote:
>On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
>
>> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
>> > On Thu, 22 Mar 2018, Anshuman Gupta wrote:
>> >
>> > > From: Rajneesh Bhardwaj
On March 26, 2018 2:11:51 AM PDT, Thomas Gleixner wrote:
>On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
>
>> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
>> > On Thu, 22 Mar 2018, Anshuman Gupta wrote:
>> >
>> > > From: Rajneesh Bhardwaj
>> > >
>> > > >From Skylake onwards,
On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> > On Thu, 22 Mar 2018, Anshuman Gupta wrote:
> >
> > > From: Rajneesh Bhardwaj
> > >
> > > >From Skylake onwards, the platform controller hub
On Mon, 26 Mar 2018, Rajneesh Bhardwaj wrote:
> On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> > On Thu, 22 Mar 2018, Anshuman Gupta wrote:
> >
> > > From: Rajneesh Bhardwaj
> > >
> > > >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> > > not
On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> On Thu, 22 Mar 2018, Anshuman Gupta wrote:
>
> > From: Rajneesh Bhardwaj
> >
> > >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> > not support legacy DMA operations to IO
On Sun, Mar 25, 2018 at 01:50:40PM +0200, Thomas Gleixner wrote:
> On Thu, 22 Mar 2018, Anshuman Gupta wrote:
>
> > From: Rajneesh Bhardwaj
> >
> > >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> > not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh,
On Thu, 22 Mar 2018, Anshuman Gupta wrote:
> From: Rajneesh Bhardwaj
>
> >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
> Currently this driver registers as
On Thu, 22 Mar 2018, Anshuman Gupta wrote:
> From: Rajneesh Bhardwaj
>
> >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
> Currently this driver registers as syscore ops and its resume
On Thu, 22 Mar 2018, Rajneesh Bhardwaj wrote:
> On Thu, Mar 22, 2018 at 03:51:58PM +0530, Anshuman Gupta wrote:
>
> Adding Thomas.
I'm already there via x...@kernel.org :)
But thanks for noticing nevertheless.
tglx
On Thu, 22 Mar 2018, Rajneesh Bhardwaj wrote:
> On Thu, Mar 22, 2018 at 03:51:58PM +0530, Anshuman Gupta wrote:
>
> Adding Thomas.
I'm already there via x...@kernel.org :)
But thanks for noticing nevertheless.
tglx
On Thu, Mar 22, 2018 at 03:51:58PM +0530, Anshuman Gupta wrote:
Adding Thomas.
> From: Rajneesh Bhardwaj
>
> From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
>
On Thu, Mar 22, 2018 at 03:51:58PM +0530, Anshuman Gupta wrote:
Adding Thomas.
> From: Rajneesh Bhardwaj
>
> From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
> Currently this driver registers
From: Rajneesh Bhardwaj
>From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
Currently this driver registers as syscore ops and its resume function is
called on every
From: Rajneesh Bhardwaj
>From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
Currently this driver registers as syscore ops and its resume function is
called on every resume from S3. On Skylake and
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