Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-13 Thread Jon Hunter
On 13/03/18 09:03, Peter De Schrijver wrote: > On Mon, Mar 12, 2018 at 11:08:51AM +, Jon Hunter wrote: >> >> On 12/03/18 09:14, Peter De Schrijver wrote: >>> On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: On 06/02/18 16:34, Peter De Schrijver wrote: > This patch

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-13 Thread Jon Hunter
On 13/03/18 09:03, Peter De Schrijver wrote: > On Mon, Mar 12, 2018 at 11:08:51AM +, Jon Hunter wrote: >> >> On 12/03/18 09:14, Peter De Schrijver wrote: >>> On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: On 06/02/18 16:34, Peter De Schrijver wrote: > This patch

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-13 Thread Peter De Schrijver
On Mon, Mar 12, 2018 at 11:08:51AM +, Jon Hunter wrote: > > On 12/03/18 09:14, Peter De Schrijver wrote: > > On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: > >> > >> On 06/02/18 16:34, Peter De Schrijver wrote: > >>> This patch prepares the dfll driver to work with PWM

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-13 Thread Peter De Schrijver
On Mon, Mar 12, 2018 at 11:08:51AM +, Jon Hunter wrote: > > On 12/03/18 09:14, Peter De Schrijver wrote: > > On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: > >> > >> On 06/02/18 16:34, Peter De Schrijver wrote: > >>> This patch prepares the dfll driver to work with PWM

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-12 Thread Jon Hunter
On 12/03/18 09:14, Peter De Schrijver wrote: > On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: >> >> On 06/02/18 16:34, Peter De Schrijver wrote: >>> This patch prepares the dfll driver to work with PWM regulators. >>> To do this we introduce a new array lut_uv which gives the voltage

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-12 Thread Jon Hunter
On 12/03/18 09:14, Peter De Schrijver wrote: > On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: >> >> On 06/02/18 16:34, Peter De Schrijver wrote: >>> This patch prepares the dfll driver to work with PWM regulators. >>> To do this we introduce a new array lut_uv which gives the voltage

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-12 Thread Peter De Schrijver
On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: > > On 06/02/18 16:34, Peter De Schrijver wrote: > > This patch prepares the dfll driver to work with PWM regulators. > > To do this we introduce a new array lut_uv which gives the voltage for > > a given index generated by the dfll

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-12 Thread Peter De Schrijver
On Thu, Mar 08, 2018 at 10:50:06PM +, Jon Hunter wrote: > > On 06/02/18 16:34, Peter De Schrijver wrote: > > This patch prepares the dfll driver to work with PWM regulators. > > To do this we introduce a new array lut_uv which gives the voltage for > > a given index generated by the dfll

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-08 Thread Jon Hunter
On 06/02/18 16:34, Peter De Schrijver wrote: > This patch prepares the dfll driver to work with PWM regulators. > To do this we introduce a new array lut_uv which gives the voltage for > a given index generated by the dfll logic. This index will then be > translated to a PMIC voltage ID in case

Re: [PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-03-08 Thread Jon Hunter
On 06/02/18 16:34, Peter De Schrijver wrote: > This patch prepares the dfll driver to work with PWM regulators. > To do this we introduce a new array lut_uv which gives the voltage for > a given index generated by the dfll logic. This index will then be > translated to a PMIC voltage ID in case

[PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-02-06 Thread Peter De Schrijver
This patch prepares the dfll driver to work with PWM regulators. To do this we introduce a new array lut_uv which gives the voltage for a given index generated by the dfll logic. This index will then be translated to a PMIC voltage ID in case of I2C using the i2c_lut. In case of a PWM regulator,

[PATCH v3 05/11] clk: tegra: prepare dfll driver for PWM regulator

2018-02-06 Thread Peter De Schrijver
This patch prepares the dfll driver to work with PWM regulators. To do this we introduce a new array lut_uv which gives the voltage for a given index generated by the dfll logic. This index will then be translated to a PMIC voltage ID in case of I2C using the i2c_lut. In case of a PWM regulator,