Hi Rob,
On 18/9/2019 2:56 PM, Dilip Kota wrote:
On 9/18/2019 2:40 AM, Rob Herring wrote:
On Wed, Sep 04, 2019 at 06:10:30PM +0800, Dilip Kota wrote:
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway
On 9/18/2019 2:40 AM, Rob Herring wrote:
On Wed, Sep 04, 2019 at 06:10:30PM +0800, Dilip Kota wrote:
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Signed-off-by: Dilip Kota
---
changes on v3:
Hi Rob,
On 9/18/2019 2:33 AM, Rob Herring wrote:
On Fri, Sep 06, 2019 at 12:19:50PM +0300, Andy Shevchenko wrote:
On Thu, Sep 05, 2019 at 10:31:29PM +0200, Martin Blumenstingl wrote:
On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota wrote:
+ phy-names:
+const: pciephy
the most popular choice
On Wed, Sep 04, 2019 at 06:10:30PM +0800, Dilip Kota wrote:
> The Intel PCIe RC controller is Synopsys Designware
> based PCIe core. Add YAML schemas for PCIe in RC mode
> present in Intel Universal Gateway soc.
>
> Signed-off-by: Dilip Kota
> ---
> changes on v3:
> Add the appropriate
On Fri, Sep 06, 2019 at 12:19:50PM +0300, Andy Shevchenko wrote:
> On Thu, Sep 05, 2019 at 10:31:29PM +0200, Martin Blumenstingl wrote:
> > On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota
> > wrote:
>
> > > + phy-names:
> > > +const: pciephy
> > the most popular choice in
On 9/6/2019 5:19 PM, Andy Shevchenko wrote:
On Thu, Sep 05, 2019 at 10:31:29PM +0200, Martin Blumenstingl wrote:
On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota wrote:
+ phy-names:
+const: pciephy
the most popular choice in Documentation/devicetree/bindings/pci/ is "pcie-phy"
if Rob is
On Fri, Sep 06, 2019 at 08:48:15PM +0300, Andy Shevchenko wrote:
> On Fri, Sep 06, 2019 at 07:17:11PM +0200, Martin Blumenstingl wrote:
> > On Fri, Sep 6, 2019 at 5:22 AM Chuan Hua, Lei
> > wrote:
>
> > > type_index = fwspec->param[1]; // index.
> > > if (type_index >=
On Fri, Sep 06, 2019 at 07:17:11PM +0200, Martin Blumenstingl wrote:
> On Fri, Sep 6, 2019 at 5:22 AM Chuan Hua, Lei
> wrote:
> > type_index = fwspec->param[1]; // index.
> > if (type_index >= ARRAY_SIZE(of_ioapic_type))
> > return -EINVAL;
> >
> > I would not see this
On Fri, Sep 6, 2019 at 5:22 AM Chuan Hua, Lei
wrote:
[...]
> >> +examples:
> >> + - |
> >> +pcie10:pcie@d0e0 {
> >> + compatible = "intel,lgm-pcie";
> >> + device_type = "pci";
> >> + #address-cells = <3>;
> >> + #size-cells = <2>;
> >> + reg = <
> >> +
Hi Chuan Hua,
On 9/5/2019 10:23 AM, Chuan Hua, Lei wrote:
Hi Dilip,
On 9/4/2019 6:10 PM, Dilip Kota wrote:
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Signed-off-by: Dilip Kota
---
changes
On Thu, Sep 05, 2019 at 10:31:29PM +0200, Martin Blumenstingl wrote:
> On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota
> wrote:
> > + phy-names:
> > +const: pciephy
> the most popular choice in Documentation/devicetree/bindings/pci/ is
> "pcie-phy"
> if Rob is happy with "pciephy" (which is
On 9/6/2019 4:31 AM, Martin Blumenstingl wrote:
Hi Dilip,
On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota wrote:
[...]
+properties:
+ compatible:
+const: intel,lgm-pcie
should we add the "snps,dw-pcie" here (and in the example below) as well?
(this is what for example
Hi Dilip,
On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota wrote:
[...]
> +properties:
> + compatible:
> +const: intel,lgm-pcie
should we add the "snps,dw-pcie" here (and in the example below) as well?
(this is what for example
Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt does)
Hi Dilip,
On 9/4/2019 6:10 PM, Dilip Kota wrote:
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Signed-off-by: Dilip Kota
---
changes on v3:
Add the appropriate License-Identifier
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Signed-off-by: Dilip Kota
---
changes on v3:
Add the appropriate License-Identifier
Rename intel,rst-interval to 'reset-assert-us'
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