Re: [PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

2021-02-13 Thread Nicolas Boichat
+Pi-Hsun Shih

On Mon, Feb 8, 2021 at 9:42 AM Jitao Shi  wrote:
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Signed-off-by: Jitao Shi 

I believe this patch (and the following) were actually authored by
Pi-Hsun: https://crrev.com/c/2628812 . Would be best to keep the
author information (unless I'm missing something of course).


> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 52f11a63a330..ffa4a0f1989f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
>  struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> u32 reg_h_fre_con;
> +   u32 max_clock_khz;
> bool edge_sel_en;
>  };
>
> @@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge 
> *bridge)
> mtk_dpi_set_display_mode(dpi, >mode);
>  }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode)
> +{
> +   struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> +   if (dpi->conf->max_clock_khz && mode->clock > 
> dpi->conf->max_clock_khz)
> +   return MODE_CLOCK_HIGH;
> +
> +   return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .attach = mtk_dpi_bridge_attach,
> .mode_set = mtk_dpi_bridge_mode_set,
> +   .mode_valid = mtk_dpi_bridge_mode_valid,
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
>  };
> @@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
>  static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> +   .max_clock_khz = 30,
>  };
>
>  static const struct mtk_dpi_conf mt2701_conf = {
> .cal_factor = mt2701_calculate_factor,
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> +   .max_clock_khz = 15,
>  };
>
>  static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> +   .max_clock_khz = 10,
>  };
>
>  static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.25.1
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel


Re: [PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

2021-02-09 Thread kernel test robot
Hi Jitao,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on robh/for-next]
[also build test ERROR on pza/reset/next linux/master linus/master v5.11-rc7 
next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jitao-Shi/Add-check-for-max-clock-rate-in-mode_valid/20210208-094340
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-r023-20210209 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
c9439ca36342fb6013187d0a69aef92736951476)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/7036ee290c5a384eeaa0b45d739a8b024235671d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jitao-Shi/Add-check-for-max-clock-rate-in-mode_valid/20210208-094340
git checkout 7036ee290c5a384eeaa0b45d739a8b024235671d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/mediatek/mtk_dpi.c:574:16: error: incompatible function 
>> pointer types initializing 'enum drm_mode_status (*)(struct drm_bridge *, 
>> const struct drm_display_info *, const struct drm_display_mode *)' with an 
>> expression of type 'enum drm_mode_status (struct drm_bridge *, const struct 
>> drm_display_mode *)' [-Werror,-Wincompatible-function-pointer-types]
   .mode_valid = mtk_dpi_bridge_mode_valid,
 ^
   1 error generated.


vim +574 drivers/gpu/drm/mediatek/mtk_dpi.c

   570  
   571  static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
   572  .attach = mtk_dpi_bridge_attach,
   573  .mode_set = mtk_dpi_bridge_mode_set,
 > 574  .mode_valid = mtk_dpi_bridge_mode_valid,
   575  .disable = mtk_dpi_bridge_disable,
   576  .enable = mtk_dpi_bridge_enable,
   577  };
   578  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip


Re: [PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

2021-02-08 Thread Chun-Kuang Hu
Hi, Jitao:

Jitao Shi  於 2021年2月8日 週一 上午9:42寫道:
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Reviewed-by: Chun-Kuang Hu 

>
> Signed-off-by: Jitao Shi 
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 52f11a63a330..ffa4a0f1989f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
>  struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> u32 reg_h_fre_con;
> +   u32 max_clock_khz;
> bool edge_sel_en;
>  };
>
> @@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge 
> *bridge)
> mtk_dpi_set_display_mode(dpi, >mode);
>  }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode)
> +{
> +   struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> +   if (dpi->conf->max_clock_khz && mode->clock > 
> dpi->conf->max_clock_khz)
> +   return MODE_CLOCK_HIGH;
> +
> +   return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .attach = mtk_dpi_bridge_attach,
> .mode_set = mtk_dpi_bridge_mode_set,
> +   .mode_valid = mtk_dpi_bridge_mode_valid,
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
>  };
> @@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
>  static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> +   .max_clock_khz = 30,
>  };
>
>  static const struct mtk_dpi_conf mt2701_conf = {
> .cal_factor = mt2701_calculate_factor,
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> +   .max_clock_khz = 15,
>  };
>
>  static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> +   .max_clock_khz = 10,
>  };
>
>  static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.25.1


[PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

2021-02-07 Thread Jitao Shi
Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Jitao Shi 
---
 drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c 
b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 52f11a63a330..ffa4a0f1989f 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -118,6 +118,7 @@ struct mtk_dpi_yc_limit {
 struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
u32 reg_h_fre_con;
+   u32 max_clock_khz;
bool edge_sel_en;
 };
 
@@ -555,9 +556,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge 
*bridge)
mtk_dpi_set_display_mode(dpi, >mode);
 }
 
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode)
+{
+   struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+   if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+   return MODE_CLOCK_HIGH;
+
+   return MODE_OK;
+}
+
 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.attach = mtk_dpi_bridge_attach,
.mode_set = mtk_dpi_bridge_mode_set,
+   .mode_valid = mtk_dpi_bridge_mode_valid,
.disable = mtk_dpi_bridge_disable,
.enable = mtk_dpi_bridge_enable,
 };
@@ -673,17 +687,20 @@ static unsigned int mt8183_calculate_factor(int clock)
 static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
+   .max_clock_khz = 30,
 };
 
 static const struct mtk_dpi_conf mt2701_conf = {
.cal_factor = mt2701_calculate_factor,
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
+   .max_clock_khz = 15,
 };
 
 static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
+   .max_clock_khz = 10,
 };
 
 static int mtk_dpi_probe(struct platform_device *pdev)
-- 
2.25.1