Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-17 Thread Wolfram Sang
> > For the record: once the designware maintainers are okay with this > > change, I am also okay with it going via the x86 platform tree. > > > Acked-by: Jarkko Nikula > Tested-by: Jarkko Nikula Acked-by: Wolfram Sang signature.asc Description: PGP signature

Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-15 Thread Jarkko Nikula
On 10/14/2018 04:17 PM, Wolfram Sang wrote: On Thu, Oct 11, 2018 at 04:29:09PM +0200, Hans de Goede wrote: On some BYT/CHT systems the SoC's P-Unit shares the I2C bus with the kernel. The P-Unit has a semaphore for the PMIC bus which we can take to block it from accessing the shared bus while th

Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-14 Thread Wolfram Sang
On Thu, Oct 11, 2018 at 04:29:09PM +0200, Hans de Goede wrote: > On some BYT/CHT systems the SoC's P-Unit shares the I2C bus with the > kernel. The P-Unit has a semaphore for the PMIC bus which we can take to > block it from accessing the shared bus while the kernel wants to access it. > > Current

Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-12 Thread Alan Cox
> > It should be. > > You mean that the problem should be purely academic, IOW that registers > touched > by the P-Unit are never touched through ACPI Opregions / power-resources? As far as I am aware. Holding the lock over both is definitely better regardless > >> 2) To safely access the sha

Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-12 Thread Hans de Goede
Hi, On 11-10-18 22:35, Alan Cox wrote: 1) PMIC accesses often come in the form of a read-modify-write on one of the PMIC registers, we currently release the P-Unit's PMIC bus semaphore between the read and the write. If the P-Unit modifies the register during this window?, then we end up overwri

Re: [PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-11 Thread Alan Cox
> 1) PMIC accesses often come in the form of a read-modify-write on one of > the PMIC registers, we currently release the P-Unit's PMIC bus semaphore > between the read and the write. If the P-Unit modifies the register during > this window?, then we end up overwriting the P-Unit's changes. > I bel

[PATCH v3 1/3] x86: baytrail/cherrytrail: Rework and move P-Unit PMIC bus semaphore code

2018-10-11 Thread Hans de Goede
On some BYT/CHT systems the SoC's P-Unit shares the I2C bus with the kernel. The P-Unit has a semaphore for the PMIC bus which we can take to block it from accessing the shared bus while the kernel wants to access it. Currently we have the I2C-controller driver acquiring and releasing the semaphor