Hi Andy,
Thank you for your check.
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Wednesday, August 1, 2018 7:21 PM
> To: Hayashibara, Keiji/林原 啓二
> Subject: Re: [PATCH v3 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Wed, Aug 1, 2018
Hi Andy,
Thank you for your check.
> From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> Sent: Wednesday, August 1, 2018 7:21 PM
> To: Hayashibara, Keiji/林原 啓二
> Subject: Re: [PATCH v3 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Wed, Aug 1, 2018
On Wed, Aug 1, 2018 at 10:29 AM, Keiji Hayashibara
wrote:
> Add SPI controller driver implemented in Socionext UniPhier SoCs.
>
> UniPhier SoCs have two types SPI controllers; SCSSI supports a
> single channel, and MCSSI supports multiple channels.
> This driver supports SCSSI only.
>
> This
On Wed, Aug 1, 2018 at 10:29 AM, Keiji Hayashibara
wrote:
> Add SPI controller driver implemented in Socionext UniPhier SoCs.
>
> UniPhier SoCs have two types SPI controllers; SCSSI supports a
> single channel, and MCSSI supports multiple channels.
> This driver supports SCSSI only.
>
> This
Add SPI controller driver implemented in Socionext UniPhier SoCs.
UniPhier SoCs have two types SPI controllers; SCSSI supports a
single channel, and MCSSI supports multiple channels.
This driver supports SCSSI only.
This controller has 32bit TX/RX FIFO with depth of eight entry,
and supports the
Add SPI controller driver implemented in Socionext UniPhier SoCs.
UniPhier SoCs have two types SPI controllers; SCSSI supports a
single channel, and MCSSI supports multiple channels.
This driver supports SCSSI only.
This controller has 32bit TX/RX FIFO with depth of eight entry,
and supports the
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