Re: [PATCH v3 3/3] dt-bindings: cpufreq: enhance MediaTek cpufreq dt-binding document

[Rob Herring]

On Fri, Jul 07, 2017 at 11:56:47AM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang 
> 
> Update binding document with adding operating-points-v2 as the required
> property and the cooling level as the optional properties and adding more
> examples guiding people how to use MediaTek cpufreq driver for MediaTek
> SoCs.
> 
> Signed-off-by: Sean Wang 
> Acked-by: Viresh Kumar 
> ---
>  .../bindings/cpufreq/cpufreq-mediatek.txt  | 170 
> -
>  1 file changed, 167 insertions(+), 3 deletions(-)

Acked-by: Rob Herring 

Re: [PATCH v3 3/3] dt-bindings: cpufreq: enhance MediaTek cpufreq dt-binding document

[Rob Herring]

On Fri, Jul 07, 2017 at 11:56:47AM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang 
> 
> Update binding document with adding operating-points-v2 as the required
> property and the cooling level as the optional properties and adding more
> examples guiding people how to use MediaTek cpufreq driver for MediaTek
> SoCs.
> 
> Signed-off-by: Sean Wang 
> Acked-by: Viresh Kumar 
> ---
>  .../bindings/cpufreq/cpufreq-mediatek.txt  | 170 
> -
>  1 file changed, 167 insertions(+), 3 deletions(-)

Acked-by: Rob Herring 

[PATCH v3 3/3] dt-bindings: cpufreq: enhance MediaTek cpufreq dt-binding document

[sean.wang]

From: Sean Wang 

Update binding document with adding operating-points-v2 as the required
property and the cooling level as the optional properties and adding more
examples guiding people how to use MediaTek cpufreq driver for MediaTek
SoCs.

Signed-off-by: Sean Wang 
Acked-by: Viresh Kumar 
---
 .../bindings/cpufreq/cpufreq-mediatek.txt  | 170 -
 1 file changed, 167 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt 
b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
index 52b457c..f640308 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
@@ -1,4 +1,5 @@
-Device Tree Clock bindins for CPU DVFS of Mediatek MT8173 SoC
+Binding for MediaTek's CPUFreq driver
+=
 
 Required properties:
 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in 
clock names.
@@ -9,6 +10,8 @@ Required properties:
  transition and not stable yet.
Please refer to 
Documentation/devicetree/bindings/clk/clock-bindings.txt for
generic clock consumer properties.
+- operating-points-v2: Please refer to 
Documentation/devicetree/bindings/opp/opp.txt
+   for detail.
 - proc-supply: Regulator for Vproc of CPU cluster.
 
 Optional properties:
@@ -17,9 +20,166 @@ Optional properties:
   Vsram to fit SoC specific needs. When absent, the voltage scaling
   flow is handled by hardware, hence no software "voltage 
tracking" is
   needed.
+- #cooling-cells:
+- cooling-min-level:
+- cooling-max-level:
+   Please refer to Documentation/devicetree/bindings/thermal/thermal.txt
+   for detail.
+
+Example 1 (MT7623 SoC):
+
+   cpu_opp_table: opp_table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-59800 {
+   opp-hz = /bits/ 64 <59800>;
+   opp-microvolt = <105>;
+   };
+
+   opp-74750 {
+   opp-hz = /bits/ 64 <74750>;
+   opp-microvolt = <105>;
+   };
+
+   opp-104000 {
+   opp-hz = /bits/ 64 <104000>;
+   opp-microvolt = <115>;
+   };
+
+   opp-119600 {
+   opp-hz = /bits/ 64 <119600>;
+   opp-microvolt = <120>;
+   };
+
+   opp-13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <130>;
+   };
+   };
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x0>;
+   clocks = < CLK_INFRA_CPUSEL>,
+< CLK_APMIXED_MAINPLL>;
+   clock-names = "cpu", "intermediate";
+   operating-points-v2 = <_opp_table>;
+   #cooling-cells = <2>;
+   cooling-min-level = <0>;
+   cooling-max-level = <7>;
+   };
+   cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x1>;
+   operating-points-v2 = <_opp_table>;
+   };
+   cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x2>;
+   operating-points-v2 = <_opp_table>;
+   };
+   cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x3>;
+   operating-points-v2 = <_opp_table>;
+   };
+
+Example 2 (MT8173 SoC):
+   cpu_opp_table_a: opp_table_a {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-50700 {
+   opp-hz = /bits/ 64 <50700>;
+   opp-microvolt = <859000>;
+   };
+
+   opp-70200 {
+   opp-hz = /bits/ 64 <70200>;
+   opp-microvolt = <908000>;
+   };
+
+   opp-100100 {
+   opp-hz = /bits/ 64 <100100>;
+   opp-microvolt = <983000>;
+   };
+
+   opp-110500 {
+   opp-hz = /bits/ 64 <110500>;
+   opp-microvolt = <1009000>;
+   };
+
+   opp-118300 {
+   opp-hz = /bits/ 64 <118300>;
+   opp-microvolt = <1028000>;
+   };
+
+   opp-140400 {
+   opp-hz = /bits/ 64 <140400>;
+   opp-microvolt = <1083000>;
+   };
+
+ 

[PATCH v3 3/3] dt-bindings: cpufreq: enhance MediaTek cpufreq dt-binding document

[sean.wang]

From: Sean Wang 

Update binding document with adding operating-points-v2 as the required
property and the cooling level as the optional properties and adding more
examples guiding people how to use MediaTek cpufreq driver for MediaTek
SoCs.

Signed-off-by: Sean Wang 
Acked-by: Viresh Kumar 
---
 .../bindings/cpufreq/cpufreq-mediatek.txt  | 170 -
 1 file changed, 167 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt 
b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
index 52b457c..f640308 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
@@ -1,4 +1,5 @@
-Device Tree Clock bindins for CPU DVFS of Mediatek MT8173 SoC
+Binding for MediaTek's CPUFreq driver
+=
 
 Required properties:
 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in 
clock names.
@@ -9,6 +10,8 @@ Required properties:
  transition and not stable yet.
Please refer to 
Documentation/devicetree/bindings/clk/clock-bindings.txt for
generic clock consumer properties.
+- operating-points-v2: Please refer to 
Documentation/devicetree/bindings/opp/opp.txt
+   for detail.
 - proc-supply: Regulator for Vproc of CPU cluster.
 
 Optional properties:
@@ -17,9 +20,166 @@ Optional properties:
   Vsram to fit SoC specific needs. When absent, the voltage scaling
   flow is handled by hardware, hence no software "voltage 
tracking" is
   needed.
+- #cooling-cells:
+- cooling-min-level:
+- cooling-max-level:
+   Please refer to Documentation/devicetree/bindings/thermal/thermal.txt
+   for detail.
+
+Example 1 (MT7623 SoC):
+
+   cpu_opp_table: opp_table {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-59800 {
+   opp-hz = /bits/ 64 <59800>;
+   opp-microvolt = <105>;
+   };
+
+   opp-74750 {
+   opp-hz = /bits/ 64 <74750>;
+   opp-microvolt = <105>;
+   };
+
+   opp-104000 {
+   opp-hz = /bits/ 64 <104000>;
+   opp-microvolt = <115>;
+   };
+
+   opp-119600 {
+   opp-hz = /bits/ 64 <119600>;
+   opp-microvolt = <120>;
+   };
+
+   opp-13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <130>;
+   };
+   };
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x0>;
+   clocks = < CLK_INFRA_CPUSEL>,
+< CLK_APMIXED_MAINPLL>;
+   clock-names = "cpu", "intermediate";
+   operating-points-v2 = <_opp_table>;
+   #cooling-cells = <2>;
+   cooling-min-level = <0>;
+   cooling-max-level = <7>;
+   };
+   cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x1>;
+   operating-points-v2 = <_opp_table>;
+   };
+   cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x2>;
+   operating-points-v2 = <_opp_table>;
+   };
+   cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0x3>;
+   operating-points-v2 = <_opp_table>;
+   };
+
+Example 2 (MT8173 SoC):
+   cpu_opp_table_a: opp_table_a {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp-50700 {
+   opp-hz = /bits/ 64 <50700>;
+   opp-microvolt = <859000>;
+   };
+
+   opp-70200 {
+   opp-hz = /bits/ 64 <70200>;
+   opp-microvolt = <908000>;
+   };
+
+   opp-100100 {
+   opp-hz = /bits/ 64 <100100>;
+   opp-microvolt = <983000>;
+   };
+
+   opp-110500 {
+   opp-hz = /bits/ 64 <110500>;
+   opp-microvolt = <1009000>;
+   };
+
+   opp-118300 {
+   opp-hz = /bits/ 64 <118300>;
+   opp-microvolt = <1028000>;
+   };
+
+   opp-140400 {
+   opp-hz = /bits/ 64 <140400>;
+   opp-microvolt = <1083000>;
+   };
+
+   opp-150800 {
+   opp-hz = /bits/