Add initial device trees for the RTD1295 SoC and the Zidoo X9S TV box.
The CPUs lack the enable-method property because the vendor device tree
uses a custom "rtk-spin-table" method and "psci" did not appear to work.
The UARTs lack the interrupts properties because the vendor device tree
connects them to a custom interrupt controller. earlycon works without.
A list of memory reservations is adopted from v1.2.11 vendor device tree:
0x0220 can be used for an initrd, 0x01b0 is audio-related;
ion-related 0x0260, 0x02c0 and 0x1100 are left out;
0x1000 is used for sharing the U-Boot environment; others remain
to be investigated.
Acked-by: Arnd Bergmann
Signed-off-by: Andreas Färber
---
v2 -> v3:
* Adopted SPDX-License-Identifier (Rob)
* Added ranges for /soc node (Rob)
* Changed #address-cells and #size-cells to 1 (Rob)
v1 -> v2:
* Dropped 0x1000 /memreserve/
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/realtek/Makefile | 5 +
arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts | 42 +++
arch/arm64/boot/dts/realtek/rtd1295.dtsi | 131 ++
4 files changed, 179 insertions(+)
create mode 100644 arch/arm64/boot/dts/realtek/Makefile
create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 080232b0270e..78f7991a5906 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -14,6 +14,7 @@ dts-dirs += marvell
dts-dirs += mediatek
dts-dirs += nvidia
dts-dirs += qcom
+dts-dirs += realtek
dts-dirs += renesas
dts-dirs += rockchip
dts-dirs += socionext
diff --git a/arch/arm64/boot/dts/realtek/Makefile
b/arch/arm64/boot/dts/realtek/Makefile
new file mode 100644
index ..8521e921e59a
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
+
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+clean-files:= *.dtb
diff --git a/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
new file mode 100644
index ..6efa8091bb30
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x 0x0003;
+/memreserve/ 0x0001f000 0x1000;
+/memreserve/ 0x0003 0x000d;
+/memreserve/ 0x01b0 0x004be000;
+/memreserve/ 0x01ffe000 0x4000;
+
+#include "rtd1295.dtsi"
+
+/ {
+ compatible = "zidoo,x9s", "realtek,rtd1295";
+ model = "Zidoo X9S";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000>;
+ };
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
new file mode 100644
index ..d8f84666c8ce
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -0,0 +1,131 @@
+/*
+ * Realtek RTD1295 SoC
+ *
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include
+
+/ {
+ compatible = "realtek,rtd1295";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x0>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x1>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x2>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x3>;
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache {
+ compatible = "cache";
+ };
+
