On Mon, Jun 19, 2017 at 03:21:36PM +0530, Arvind Yadav wrote:
> 'commit 47ff3de911a7 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")' in order to
> clear
> MSI and MAIN interrupts requests wrote '0' to PCIECTRL_TI_CONF_IRQSTATUS_MSI
> and PCIECTRL_TI_CONF_IRQSTATUS_MAIN registers. However the TRM has
On Mon, Jun 19, 2017 at 03:21:36PM +0530, Arvind Yadav wrote:
> 'commit 47ff3de911a7 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")' in order to
> clear
> MSI and MAIN interrupts requests wrote '0' to PCIECTRL_TI_CONF_IRQSTATUS_MSI
> and PCIECTRL_TI_CONF_IRQSTATUS_MAIN registers. However the TRM has
'commit 47ff3de911a7 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")' in order to
clear
MSI and MAIN interrupts requests wrote '0' to PCIECTRL_TI_CONF_IRQSTATUS_MSI
and PCIECTRL_TI_CONF_IRQSTATUS_MAIN registers. However the TRM has mentioned to
write '1' to clear pending event in these two registers.
'commit 47ff3de911a7 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")' in order to
clear
MSI and MAIN interrupts requests wrote '0' to PCIECTRL_TI_CONF_IRQSTATUS_MSI
and PCIECTRL_TI_CONF_IRQSTATUS_MAIN registers. However the TRM has mentioned to
write '1' to clear pending event in these two registers.
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