[PATCH v4 0/6] Xilinx Zynq OCM support

Hi, this is the next attepmt to add support for On Chip Memory configuration via On Chip Memory Controller. OCM can be divided into 4 independend blocks and placed to two locations which this driver detects. For everybody on-chip SRAM driver "mmio-sram" is missing parity IRQ handling not sure

[PATCH v4 0/6] Xilinx Zynq OCM support

Hi, this is the next attepmt to add support for On Chip Memory configuration via On Chip Memory Controller. OCM can be divided into 4 independend blocks and placed to two locations which this driver detects. For everybody on-chip SRAM driver mmio-sram is missing parity IRQ handling not sure how