On 01/08/2019 10:08 PM, Liang, Kan wrote:
On 1/8/2019 1:13 AM, Wei Wang wrote:
On 01/07/2019 10:22 PM, Liang, Kan wrote:
Thanks for sharing. I understand the point of maintaining those
models at one place,
but this factor-out doesn't seem very elegant to me, like below
__intel_pmu_init
On 1/8/2019 1:13 AM, Wei Wang wrote:
On 01/07/2019 10:22 PM, Liang, Kan wrote:
Thanks for sharing. I understand the point of maintaining those
models at one place,
but this factor-out doesn't seem very elegant to me, like below
__intel_pmu_init (int model, struct x86_pmu *x86_pmu)
{
...
On 01/07/2019 10:22 PM, Liang, Kan wrote:
Thanks for sharing. I understand the point of maintaining those
models at one place,
but this factor-out doesn't seem very elegant to me, like below
__intel_pmu_init (int model, struct x86_pmu *x86_pmu)
{
...
switch (model)
case INTEL_FAM6_NEHALEM:
On 1/5/2019 5:09 AM, Wei Wang wrote:
On 01/04/2019 11:57 PM, Liang, Kan wrote:
On 1/4/2019 4:58 AM, Wei Wang wrote:
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+ /*
+ * It could be possible that people have vcpus of old model
run on
+
On Friday, January 4, 2019 11:54 PM, Jim Mattson wrote:
> On Fri, Jan 4, 2019 at 2:03 AM Wei Wang wrote:
> >
> > On 01/03/2019 11:34 PM, Jim Mattson wrote:
> > > Fast forward to, say, 2021. You're decommissioning all Broadwell
> > > servers in your data center. You have to migrate the running VMs
On 01/04/2019 11:57 PM, Liang, Kan wrote:
On 1/4/2019 4:58 AM, Wei Wang wrote:
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+/*
+ * It could be possible that people have vcpus of old model
run on
+ * physcal cpus of newer model, for
On 1/4/2019 4:58 AM, Wei Wang wrote:
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+ /*
+ * It could be possible that people have vcpus of old model run on
+ * physcal cpus of newer model, for example a BDW guest on a SKX
+ * machine
On Fri, Jan 4, 2019 at 2:03 AM Wei Wang wrote:
>
> On 01/03/2019 11:34 PM, Jim Mattson wrote:
> > Fast forward to, say, 2021. You're decommissioning all Broadwell
> > servers in your data center. You have to migrate the running VMs off
> > of those Broadwell systems onto newer hardware. But, with
On 01/03/2019 11:34 PM, Jim Mattson wrote:
On Wed, Jan 2, 2019 at 11:16 PM Wei Wang wrote:
On 01/03/2019 07:26 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+/*
+ * It could be possible that people have vcpus of old model run on
+ * physcal cpus of newer model, for example a BDW guest on a SKX
+ * machine (but not possible to be the other way
> Yes, but then what happens?
>
> Fast forward to, say, 2021. You're decommissioning all Broadwell
> servers in your data center. You have to migrate the running VMs off
> of those Broadwell systems onto newer hardware. But, with the current
> implementation, the migration cannot happen. So, what
On Wed, Jan 2, 2019 at 11:16 PM Wei Wang wrote:
>
> On 01/03/2019 07:26 AM, Jim Mattson wrote:
> > On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
> >> The lbr stack is architecturally specific, for example, SKX has 32 lbr
> >> stack entries while HSW has 16 entries, so a HSW guest running on a
On 01/03/2019 07:26 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16 entries, so a HSW guest running on a SKX
machine may not get accurate perf results. Currently, we
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
>
> The lbr stack is architecturally specific, for example, SKX has 32 lbr
> stack entries while HSW has 16 entries, so a HSW guest running on a SKX
> machine may not get accurate perf results. Currently, we forbid the
> guest lbr enabling when the
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+ /*
+* It could be possible that people have vcpus of old model run on
+* physcal cpus of newer model, for example a BDW guest on a SKX
+* machine (but not possible to be the other way around).
+* The BDW guest
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16 entries, so a HSW guest running on a SKX
machine may not get accurate perf results. Currently, we forbid the
guest lbr enabling when the guest and host see different lbr stack
entries.
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