On Mon, Jan 7, 2019 at 11:48 PM Wei Wang wrote:
>
> On 01/08/2019 02:48 AM, Jim Mattson wrote:
> > On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
> >>> The issue is compatibility. Prior to your change, reading this MSR
> >>> from a VM would raise #GP. After your change, it won't. That means
>
On 01/08/2019 02:48 AM, Jim Mattson wrote:
On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
The issue is compatibility. Prior to your change, reading this MSR
from a VM would raise #GP. After your change, it won't. That means
that if you have a VM migrating between hosts with kernel versions
On Mon, Jan 7, 2019 at 12:14 PM Andi Kleen wrote:
>
> On Mon, Jan 07, 2019 at 10:48:38AM -0800, Jim Mattson wrote:
> > On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
> > >
> > > > The issue is compatibility. Prior to your change, reading this MSR
> > > > from a VM would raise #GP. After your
On Mon, Jan 07, 2019 at 10:48:38AM -0800, Jim Mattson wrote:
> On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
> >
> > > The issue is compatibility. Prior to your change, reading this MSR
> > > from a VM would raise #GP. After your change, it won't. That means
> > > that if you have a VM
On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
>
> > The issue is compatibility. Prior to your change, reading this MSR
> > from a VM would raise #GP. After your change, it won't. That means
> > that if you have a VM migrating between hosts with kernel versions
> > before and after this
> The issue is compatibility. Prior to your change, reading this MSR
> from a VM would raise #GP. After your change, it won't. That means
> that if you have a VM migrating between hosts with kernel versions
> before and after this change, the results will be inconsistent. In the
No it will not
On Mon, Jan 7, 2019 at 1:09 AM Wei Wang wrote:
>
> On 01/03/2019 11:25 PM, Jim Mattson wrote:
> > On Wed, Jan 2, 2019 at 11:55 PM Wei Wang wrote:
> >
> >> Right, thanks. Probably better to change it to below:
> >>
> >> msr_info->data = 0;
> >> data = native_read_msr(MSR_IA32_PERF_CAPABILITIES);
On 01/03/2019 11:25 PM, Jim Mattson wrote:
On Wed, Jan 2, 2019 at 11:55 PM Wei Wang wrote:
Right, thanks. Probably better to change it to below:
msr_info->data = 0;
data = native_read_msr(MSR_IA32_PERF_CAPABILITIES);
if (vcpu->kvm->arch.lbr_in_guest)
msr_info->data |= (data &
On Wed, Jan 2, 2019 at 11:55 PM Wei Wang wrote:
> Right, thanks. Probably better to change it to below:
>
> msr_info->data = 0;
> data = native_read_msr(MSR_IA32_PERF_CAPABILITIES);
> if (vcpu->kvm->arch.lbr_in_guest)
> msr_info->data |= (data & X86_PERF_CAP_MASK_LBR_FMT);
>
This still
On 01/03/2019 07:40 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
>
> Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
> the addresses stored in the LBR stack. Expose those bits to the guest
> when the guest lbr feature is enabled.
>
> Signed-off-by: Wei Wang
> Cc: Paolo Bonzini
> Cc: Andi
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/include/asm/perf_event.h | 2 ++
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