[PATCH v4 09/11] PCI: imx6: Restrict PHY register data to 16-bit

[Andrey Smirnov]

PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
instead of 'int'. No functional change intended.

Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com>
Reviewed-by: Lucas Stach <l.st...@pengutronix.de>
Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Bjorn Helgaas <bhelg...@google.com>
Cc: Chris Healy <cphe...@gmail.com>
Cc: Lucas Stach <l.st...@pengutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-...@vger.kernel.org
---
 drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c 
b/drivers/pci/controller/dwc/pci-imx6.c
index 3fd084357488..30e764b6cbcc 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -195,10 +195,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, 
int addr)
 }
 
 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
-static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
+static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
 {
        struct dw_pcie *pci = imx6_pcie->pci;
-       u32 val, phy_ctl;
+       u32 phy_ctl;
        int ret;
 
        ret = pcie_phy_wait_ack(imx6_pcie, addr);
@@ -213,8 +213,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int 
addr, int *data)
        if (ret)
                return ret;
 
-       val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
-       *data = val & 0xffff;
+       *data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
 
        /* deassert Read signal */
        dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
@@ -222,7 +221,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int 
addr, int *data)
        return pcie_phy_poll_ack(imx6_pcie, false);
 }
 
-static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
+static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
 {
        struct dw_pcie *pci = imx6_pcie->pci;
        u32 var;
@@ -279,7 +278,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int 
addr, int data)
 
 static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
 {
-       u32 tmp;
+       u16 tmp;
 
        if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
                return;
@@ -675,7 +674,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
 {
        unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
        int mult, div;
-       u32 val;
+       u16 val;
 
        if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
                return 0;
-- 
2.20.1