Re: [PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

On Tue, Jun 21, 2016 at 7:10 AM, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden

Re: [PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

On Tue, Jun 21, 2016 at 7:10 AM, Tan Jui Nee wrote: > From: Andy Shevchenko > > There is already one and at least one more user coming which > require an access to Primary to Sideband bridge (P2SB) in order > to get IO or MMIO bar hidden by BIOS. > Create a driver to access P2SB for x86

[PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong, Jonathan Signed-off-by: Andy Shevchenko