-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 02/09/15 17:47, Felipe Balbi wrote:
> On Wed, Sep 02, 2015 at 05:24:23PM +0300, Roger Quadros wrote:
>> There is a race happening during dwc3_drd_init() that causes
>> otg events to get disabled. This is what happens.
>>
>> dwc3_otg_irq() happens
On Wed, Sep 02, 2015 at 05:24:23PM +0300, Roger Quadros wrote:
> There is a race happening during dwc3_drd_init() that causes
> otg events to get disabled. This is what happens.
>
> dwc3_otg_irq() happens immediately when PRTCAP is set to OTG,
> even though OEVTEN is 0. This is because BIT 31 IRQ
There is a race happening during dwc3_drd_init() that causes
otg events to get disabled. This is what happens.
dwc3_otg_irq() happens immediately when PRTCAP is set to OTG,
even though OEVTEN is 0. This is because BIT 31 IRQ of
OEVT can't be disabled by OEVTEN.
We configure OEVTEN in dwc3_otg_init
3 matches
Mail list logo