[...]
> Do CPUs enter the kernel at EL2 or at EL1?
> >>>
> >>> Could you give me a tip how to check the kernel at EL2 or EL1?
> >>
> >> Hmm... I thought we logged this but it looks like we don't.
> >>
> >> You could hack in a check of is_hyp_mode_available() and
> >>
[...]
Do CPUs enter the kernel at EL2 or at EL1?
Could you give me a tip how to check the kernel at EL2 or EL1?
Hmm... I thought we logged this but it looks like we don't.
You could hack in a check of is_hyp_mode_available() and
is_hyp_mode_mismatched(). That will tell you if
Hi Mark,
On 03/06/2015 09:18 PM, Chanwoo Choi wrote:
> Hi,
>
> On 03/06/2015 08:40 PM, Mark Rutland wrote:
[snip]
>>
I take it CPUs boot at EL2?
>>
>> Do the CPUs boot at EL1 or EL2?
>
> Unfortunately, I cannot check the secure firmware for Exynos5433 SoC.
> I
Hi Mark,
On 03/06/2015 09:18 PM, Chanwoo Choi wrote:
Hi,
On 03/06/2015 08:40 PM, Mark Rutland wrote:
[snip]
I take it CPUs boot at EL2?
Do the CPUs boot at EL1 or EL2?
Unfortunately, I cannot check the secure firmware for Exynos5433 SoC.
I think that a few SoC provider probably would
Hi,
On 03/06/2015 08:40 PM, Mark Rutland wrote:
>> CPU0 (boot CPU) is only well working for CPU_OFF.
>> But when I try to turn on the CPU0 after CPU_OFF, I failed it.
>
> That's rather worrying. Can you look into what's going on here? I'd
> rather not have dts describing
> CPU0 (boot CPU) is only well working for CPU_OFF.
> But when I try to turn on the CPU0 after CPU_OFF, I failed it.
> >>>
> >>> That's rather worrying. Can you look into what's going on here? I'd
> >>> rather not have dts describing things which are known to be broken.
> >>
> >> The
Hi,
On 03/06/2015 08:40 PM, Mark Rutland wrote:
CPU0 (boot CPU) is only well working for CPU_OFF.
But when I try to turn on the CPU0 after CPU_OFF, I failed it.
That's rather worrying. Can you look into what's going on here? I'd
rather not have dts describing things which are known to be
CPU0 (boot CPU) is only well working for CPU_OFF.
But when I try to turn on the CPU0 after CPU_OFF, I failed it.
That's rather worrying. Can you look into what's going on here? I'd
rather not have dts describing things which are known to be broken.
The board dts don't include any
Hi,
On 03/06/2015 03:54 AM, Mark Rutland wrote:
> Hi,
>
>> + psci {
>> + compatible = "arm,psci";
>> + method = "smc";
>> + cpu_off = <0x8402>;
>> + cpu_on = <0xC403>;
>> + };
>
> Back at
Hi,
> >> >> + psci {
> >> >> + compatible = "arm,psci";
> >> >> + method = "smc";
> >> >> + cpu_off = <0x8402>;
> >> >> + cpu_on = <0xC403>;
> >> >> + };
> >> >
> >> > Back at v2 you mentioned that CPU_OFF wasn't working
Hi,
On Fri, Mar 6, 2015 at 2:04 AM, Mark Rutland wrote:
> Hi,
>
> [...]
>
>> >> + psci {
>> >> + compatible = "arm,psci";
>> >> + method = "smc";
>> >> + cpu_off = <0x8402>;
>> >> + cpu_on = <0xC403>;
>> >> + };
>> >
>>
Hi,
[...]
> >> + psci {
> >> + compatible = "arm,psci";
> >> + method = "smc";
> >> + cpu_off = <0x8402>;
> >> + cpu_on = <0xC403>;
> >> + };
> >
> > Back at v2 you mentioned that CPU_OFF wasn't working [1].
> >
> > Do
Hi Mark,
On Thu, Mar 5, 2015 at 9:24 PM, Mark Rutland wrote:
> On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433
>> supports
>>
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
> PSCI (Power State Coordination Interface) v0.1.
>
> This patch includes
Hi,
On 03/06/2015 03:54 AM, Mark Rutland wrote:
Hi,
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you mentioned that CPU_OFF wasn't working [1].
Do
Hi,
On Fri, Mar 6, 2015 at 2:04 AM, Mark Rutland mark.rutl...@arm.com wrote:
Hi,
[...]
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you
Hi,
[...]
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you mentioned that CPU_OFF wasn't working [1].
Do both CPU_ON and CPU_OFF work for
Hi Mark,
On Thu, Mar 5, 2015 at 9:24 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433
Hi,
+ psci {
+ compatible = arm,psci;
+ method = smc;
+ cpu_off = 0x8402;
+ cpu_on = 0xC403;
+ };
Back at v2 you mentioned that CPU_OFF wasn't working [1].
Do both CPU_ON and CPU_OFF work for
On Thu, Mar 05, 2015 at 05:38:23AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.
This patch includes
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.
This patch includes following dt node to support Exynos5433 SoC:
1. Octa core for big.LITTLE
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.
This patch includes following dt node to support Exynos5433 SoC:
1. Octa core for big.LITTLE
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