On 09/12/2018 04:26 PM, Tim Chen wrote:
> On 09/12/2018 10:16 AM, Tom Lendacky wrote:
>>
>>
>> On 09/11/2018 04:16 PM, Thomas Gleixner wrote:
>>> On Tue, 11 Sep 2018, Tim Chen wrote:
On 09/10/2018 04:46 AM, Jiri Kosina wrote:
> Nah, IBPB is actuall there, sorry. So I'll add reporting of ST
On 09/12/2018 02:45 PM, Jiri Kosina wrote:
> On Wed, 12 Sep 2018, Tim Chen wrote:
>
>> I'm working on a patch for choosing the Spectre v2 app to app
>> mitigation option.
>>
>> Something like the following:
>>
>> enum spectre_v2_app2app_mitigation {
>> SPECTRE_V2_APP2APP_NONE,
>> S
On Wed, 12 Sep 2018, Tim Chen wrote:
> I'm working on a patch for choosing the Spectre v2 app to app
> mitigation option.
>
> Something like the following:
>
> enum spectre_v2_app2app_mitigation {
> SPECTRE_V2_APP2APP_NONE,
> SPECTRE_V2_APP2APP_LITE,
> SPECTRE_V2_APP2APP_
On 09/12/2018 10:16 AM, Tom Lendacky wrote:
>
>
> On 09/11/2018 04:16 PM, Thomas Gleixner wrote:
>> On Tue, 11 Sep 2018, Tim Chen wrote:
>>> On 09/10/2018 04:46 AM, Jiri Kosina wrote:
Nah, IBPB is actuall there, sorry. So I'll add reporting of STIBP + fixup
the missing reporting of RSB
On 09/11/2018 04:16 PM, Thomas Gleixner wrote:
> On Tue, 11 Sep 2018, Tim Chen wrote:
>> On 09/10/2018 04:46 AM, Jiri Kosina wrote:
>>> Nah, IBPB is actuall there, sorry. So I'll add reporting of STIBP + fixup
>>> the missing reporting of RSB_CTXSW for v6.
>>>
>>
>> I anticipate that STIBP coul
On Tue, 11 Sep 2018, Thomas Gleixner wrote:
> On Tue, 11 Sep 2018, Tim Chen wrote:
> > On 09/10/2018 04:46 AM, Jiri Kosina wrote:
> > > Nah, IBPB is actuall there, sorry. So I'll add reporting of STIBP + fixup
> > > the missing reporting of RSB_CTXSW for v6.
> > >
> >
> > I anticipate that STIB
On Tue, 11 Sep 2018, Tim Chen wrote:
> On 09/10/2018 04:46 AM, Jiri Kosina wrote:
> > Nah, IBPB is actuall there, sorry. So I'll add reporting of STIBP + fixup
> > the missing reporting of RSB_CTXSW for v6.
> >
>
> I anticipate that STIBP could affect workloads with a lot of indirect
> branches
On 09/10/2018 04:46 AM, Jiri Kosina wrote:
> On Mon, 10 Sep 2018, Jiri Kosina wrote:
>
>>> That looks much more palatable. One missing piece is the sysfs
>>> mitigation file for spectre v2. That should reflect STIPB state as well.
>>
>> FWIW, we're missing a bit more in that area, namely RSB stuf
On Mon, 10 Sep 2018, Jiri Kosina wrote:
> > That looks much more palatable. One missing piece is the sysfs
> > mitigation file for spectre v2. That should reflect STIPB state as well.
>
> FWIW, we're missing a bit more in that area, namely RSB stuffing on
> context switch, IBRS (even through on
On Mon, 10 Sep 2018, Thomas Gleixner wrote:
> That looks much more palatable. One missing piece is the sysfs
> mitigation file for spectre v2. That should reflect STIPB state as well.
FWIW, we're missing a bit more in that area, namely RSB stuffing on
context switch, IBRS (even through only aro
On Mon, 10 Sep 2018, Jiri Kosina wrote:
> +static void update_stibp_msr(void *info)
> +{
> + wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
> +}
> +
> +void arch_smt_update(void)
> +{
> + if (stibp_needed()) {
if (!stib_needed())
return;
spares you an indentation
From: Jiri Kosina
STIBP is a feature provided by certain Intel ucodes / CPUs. This feature
(once enabled) prevents cross-hyperthread control of decisions made by
indirect branch predictors.
Enable this feature if
- the CPU is vulnerable to spectre v2
- the CPU supports SMT and has SMT siblings
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